STM8S datasheet(273/467 Pages) STMICROELECTRONICS

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RM0016

Serial peripheral interface (SPI)

287

Figure 97. TXE/BSY in slave transmit-only mode (BDM = 0 and RXONLY = 0).

Case of continuous transfers

Bidirectional transmit procedure (BDM = 1 and BDOE = 1)

In this mode, the procedure is similar to the Transmit-only procedure except that the BDM

and BDOE bits must both be set in the SPI_CR2 register before enabling the SPI.

Unidirectional receive-only procedure (BDM = 0 and RXONLY = 1)

In this mode, the procedure can be reduced as described below (see Figure 98):

Set the RXONLY bit in the SPI_CR2 register

Enable the SPI by setting bit SPE to 1:

In master mode, this immediately activates the generation of the SCK clock, and

data is received serially until the SPI is disabled (SPE = 0).

In slave mode, data are received when the SPI master device drives NSS low and

generates the SCK clock.

Wait until RXNE =1 and read the SPI_DR register to get the received data (this clears

the RXNE bit). Repeat this operation for each data to be received.

This procedure can be also implemented using dedicated interrupt subroutines launched at

each rising edge of the RXNE flag.

Note:

If it is required to disable the SPI after the last transfer, follow the recommendation

described in Section 20.3.8: Disabling the SPI on page 277.

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