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STM8S bảng dữ liệu(PDF) 152 Page - STMicroelectronics

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STM8S bảng dữ liệu(HTML) 152 Page - STMicroelectronics

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16-bit advanced control timer (TIM1)
RM0016
152/467
DocID14587 Rev 14
17.4.2
Internal clock source (fMASTER)
If both the clock/trigger mode controller and the external trigger input are disabled
(SMS = 000 in TIM1_SMCR and ECE = 0 in the TIM1_ETR register), the CEN, DIR, and UG
bits behave as control bits and can be changed only by software (except UG which remains
cleared automatically). As soon as the CEN bit is written to 1, the prescaler is clocked by the
internal clock.
The figure below shows the behavior of the control circuit and the up-counter in normal
mode, without the prescaler.
Figure 44. Control circuit in normal mode, fCK_PSC = fMASTER
17.4.3
External clock source mode 1
The counter can count at each rising or falling edge on a selected timer input. This mode is
selected when SMS = 111 in the TIM1_SMCR register (see Figure 45).
Figure 45. TI2 external clock connection example



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