PCF2127TSLASH2Y datasheet(8/100 Pages) PHILIPS

8 / 100 page

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Table 5.

Bit positions labeled as - are not implemented and return 0 when read. Bits labeled as T must always be written with logic 0. Bits labeled as X are undefined at

power-on and unchanged by subsequent resets.

Address

Bit

Reset value

Reference

Control registers

00h

Control_1

EXT_

TEST

TSTOP

TSF1

POR_

OVRD

12_24

0000 1000

Table 7 on page 10

01h

Control_2

MSF

WDTF

TSF2

CDTF

TSIE

AIE

CDTIE

0000 0000

Table 9 on page 11

02h

Control_3

PWRMNG[2:0]

BTSE

BLF

BIE

BLIE

0000 0000

Table 11 on page 12

Time and date registers

03h

Seconds

OSF

SECONDS (0 to 59)

1XXX XXXX

Table 28 on page 30

04h

Minutes

MINUTES (0 to 59)

- XXX XXXX

Table 31 on page 31

05h

Hours

AMPM

HOURS (1 to 12) in 12-hour mode

- - XX XXXX

Table 33 on page 32

HOURS (0 to 23) in 24-hour mode

- - XX XXXX

06h

Days

DAYS (1 to 31)

- - XX XXXX

Table 35 on page 32

07h

Weekdays

----

WEEKDAYS (0 to 6)

- - - - - XXX

Table 37 on page 33

08h

Months

MONTHS (1 to 12)

- - - X XXXX

Table 40 on page 34

09h

Years

YEARS (0 to 99)

XXXX XXXX

Table 43 on page 35

Alarm registers

0Ah

Second_alarm

AE_S

SECOND_ALARM (0 to 59)

1XXX XXXX

Table 45 on page 38

0Bh

Minute_alarm

AE_M

MINUTE_ALARM (0 to 59)

1XXX XXXX

Table 47 on page 38

0Ch

Hour_alarm

AE_H

AMPM

HOUR_ALARM (1 to 12) in 12-hour mode

1 - XX XXXX

Table 49 on page 39

HOUR_ALARM (0 to 23) in 24-hour mode

1 - XX XXXX

0Dh

Day_alarm

AE_D

DAY_ALARM (1 to 31)

1 - XX XXXX

Table 51 on page 39

0Eh

Weekday_alarm

AE_W

WEEKDAY_ALARM (0 to 6)

1 - - - - XXX

Table 53 on page 40

CLKOUT control register

0Fh

CLKOUT_ctl

TCR[1:0]

OTPR

COF[2:0]

00X - - 000

Table 13 on page 12

watchdog registers

10h

Watchdg_tim_ctl

WD_CD[1:0]

TI_TP

TF[1:0]

000 - - - 11

Table 55 on page 41

11h

Watchdg_tim_val

WATCHDG_TIM_VAL[7:0]

XXXX XXXX

Table 57 on page 42

Timestamp registers

12h

Timestp_ctl

TSM

TSOFF

1_O_16_TIMESTP[4:0]

00 - X XXXX

Table 68 on page 50

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