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PCF2127T/2Y bảng dữ liệu(PDF) 68 Page - NXP Semiconductors |
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PCF2127T/2Y bảng dữ liệu(HTML) 68 Page - NXP Semiconductors |
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68 / 100 page ![]() PCF2127 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 8 — 19 December 2014 68 of 100 NXP Semiconductors PCF2127 Accurate RTC with integrated quartz crystal for industrial applications The R/W bit defines the direction of the following single or multiple byte data transfer (read is logic 1, write is logic 0). For the format and the timing of the START condition (S), the STOP condition (P), and the acknowledge (A) refer to the I2C-bus specification Ref. 13 “UM10204” and the characteristics table (Table 93). In the write mode, a data transfer is terminated by sending a STOP condition. A repeated START (Sr) condition is not applicable. Table 88. I2C slave address byte Slave address Bit 7 6 5 4 3 2 1 0 MSB LSB 10 10 00 1R/W Fig 44. Bus protocol, writing to registers Fig 45. Bus protocol, reading from registers |
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