AX68004LF datasheet(13/57 Pages) ASIX

13 / 57 page

AX6800x

2/4-Port USB KVM Switch SoC

1.3 AX6800x Block Diagram

Note: U[3:2]_SCL, U[3:2]_SDA, TM[2:0]_CK, TM[2:0]_GT, INT0, PS2A_CK, PS2A_D, PS2B_CK, PS2B_D,

CTS1, SDR1 RI1, DCD1, P1[7:0], P3[7:0], U2_VBUS, U2_DP, U2_DM, D[3:2]_VBEN, D[3:2]_VOC,

D[3:2]_DP, D[3:2]_DM are for AX68004 only.

Figure 1-1: AX6800x Block Diagram

PS2A_CK, PS2A_D,

PS2B_CK, PS2B_D

Power Management

Unit

Watchdog Timer

3 Timer/Counters

Interrupt Controller

Debugger

1T 8051/80390 Core

CPU

32KB

Data SRAM

Memory Arbiter &

DMA Controllers

USB Host Controller

& Root Hub

USB Device

Controller0

USB Device

Controller1

USB Device

Controller2

USB Device

Controller3

128KB Program

Flash Memory &

1KB Information

Page

Flash Controller

32 GPIO

Misc.

POR & Reset Gen.

High Speed SPI

Master

High Speed SPI

Slave

I2C Master

I2C Slave [3:0]

UART0

TM[2:0]_CK, TM[2:0]_GT

INT0

TXD0, RXD0

Memory Access

P0[7:0], P1[7:0],

P2[7:0], P3[7:0]

DB_DO, DB_CKO, DB_DI

D[3:0]_VBEN, D[3:0]_VOC,

D[3:0]_DP, D[3:0]_DM

MSS[2:0], MSCLK,

MMOSI, MMISO

U0_VBUS, U0_DP, U0_DM

U1_VBUS, U1_DP, U1_DM

U2_VBUS, U2_DP, U2_DM

U3_VBUS, U3_DP, U3_DM

SCL, SDA

U[3:0]_SCL, U[3:0]_SDA

RST_N

SSS, SSCLK,

SMOSI, SMISO

Buzzer

SFR Access

PS2

RXD1, TXD1, CTS1, SDR1

RI1, DCD1, RTS1/DE1

DTR1/RE1

High Speed UART 1

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