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LPC47M14X bảng dữ liệu(PDF) 191 Page - SMSC Corporation

tên linh kiện LPC47M14X
Giải thích chi tiết về linh kiện  128 PIN ENGANCED SUPER I/O CONTROLLER WITH AN LPC INTERFACE AND USB HUB
PDF  205 Pages
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nhà sản xuất  SMSC [SMSC Corporation]
Trang chủ  http://www.smsc.com
Logo SMSC - SMSC Corporation

LPC47M14X bảng dữ liệu(HTML) 191 Page - SMSC Corporation

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SMSC DS – LPC47M14X
Page 191
Rev. 03/19/2001
FIGURE 32 – PARALLEL PORT FIFO TIMING
NAME
DESCRIPTION
MIN
TYP
MAX
UNITS
t1
PDATA Valid to nSTROBE Active
600
ns
t2
nSTROBE Active Pulse Width
600
ns
t3
PDATA Hold from nSTROBE Inactive (Note 1)
450
ns
t4
nSTROBE Active to BUSY Active
500
ns
t5
BUSY Inactive to nSTROBE Active
680
ns
t6
BUSY Inactive to PDATA Invalid (Note 1)
80
ns
Note 1: The data is held until BUSY goes inactive or for time t3, whichever is longer. This only applies if another data
transfer is pending. If no other data transfer is pending, the data is held indefinitely.
t3
t4
t1
t2
t7
t8
t6
t5
t6
nALF
PD<7:0>
BUSY
nSTROBE
FIGURE 33 – ECP PARALLEL PORT FORWARD TIMING
NAME
DESCRIPTION
MIN
TYP
MAX
UNITS
t1
nALF Valid to nSTROBE Asserted
0
60
ns
t2
PDATA Valid to nSTROBE Asserted
0
60
ns
t3
BUSY Deasserted to nALF Changed
(Notes 1,2)
80
180
ns
t4
BUSY Deasserted to PDATA Changed (Notes 1,2)
80
180
ns
t5
nSTROBE Asserted to Busy Asserted
0
ns
t6
nSTROBE Deasserted to Busy Deasserted
0
ns
t7
BUSY Deasserted to nSTROBE Asserted (Notes 1,2)
80
200
ns
t8
BUSY Asserted to nSTROBE Deasserted (Note 2)
80
180
ns
Note 1: Maximum value only applies if there is data in the FIFO waiting to be written out.
Note 2: BUSY is not considered asserted or deasserted until it is stable for a minimum of 75 to 130 ns.
t3
t6
t1
t2
t5
t4
PD<7:0>
nSTROBE
BUSY



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