Approval Sheet

Page 9 of 15

ASC_RMASMS535ATF03_V03

Jul. 2018

Table 9. Register Mapping

Table 9. shows the list of the registers inside the RMASMS535ATF03.

Register Address

Bits

Read/Write

Description

Default Value

(binary)

Hex

Binary

0x00

00000

[7:0]

R/W

LB Switch Control Register

See Table 10

0x01

00001

[7:0]

R/W

HB Switch Control Register

See Table 11

0x1A

11010

[7:0]

R/W

RFFE Status (see Table 12)

0000 0000

0x1B

11011

[3:0]

R/W

GSID

0000 0000

0x1C

11100

[7:6]

[5:0]

R/W

Power Mode (see Table 13)

Triggers (see Table 14)

00

000000

0x1D

11101

[7:0]

R

Product ID

0011 1101

0x1E

11110

[7:0]

R

Manufacturer ID [7:0]

0010 0110

0x1F

11111

[7:6]

[5:4]

[3:0]

R

SPARE

00

Manufacturer ID [9:8]

01

USID

1011

Note : The RMASMS535ATF03 start-up procedure as below description.

The RMASMS535ATF03 requires to be disabled the triggers before programming the switch control registers when

RMASMS535ATF03 operating in the active mode. The table of register address setup as below.

Register Address

Bits

Read/Write

Value (binary)

Hex

Binary

0x1C

11100

[7:6]

[5:0]

R/W

00

111000

Table 10. Switch Control Register

Bank A Antenna Path

Register_0 Bits

Bit[7]

Bit[6]

Bit[5]

Bit[4]

Bit[3]

Bit[2]

Bit[1]

Bit[0]

TRxLB1

X

0

0

0

0

0

0

1

TRxLB2

X

0

0

0

0

0

1

0

TRxLB3

X

0

0

0

0

1

0

0

TRxLB4

X

0

0

0

0

1

1

1

TRxLB5

X

0

0

0

1

0

1

1

TRxLB6

X

0

0

1

0

0

0

0

TRxLB7

X

0

0

1

0

1

1

0

TRxLB8

X

0

0

1

1

1

0

1

TXLB

X

1

0

0

0

0

1

1

Isolation mode

X

0

0

0

0

0

0

0

Define: X= not used