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PCD6003 bảng dữ liệu(PDF) 37 Page - NXP Semiconductors

tên linh kiện PCD6003
Giải thích chi tiết về linh kiện  Digital telephone answering machine chip
PDF  96 Pages
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nhà sản xuất  PHILIPS [NXP Semiconductors]
Trang chủ  http://www.nxp.com
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PCD6003 bảng dữ liệu(HTML) 37 Page - NXP Semiconductors

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2001 Apr 17
37
Philips Semiconductors
Product specification
Digital telephone answering machine chip
PCD6003
10.11 I2C-bus
The serial port I2C-bus is a simple bidirectional 2-wire bus
for efficient inter IC data exchange. The I2C-bus consists
of a data line (SDA) and a clock line (SCL). These lines
also function as I/O Port P1.7 and P1.6 respectively.
The system is unique because data transport, clock
generation, address recognition and bus arbitration are all
controlled by hardware. The I2C-bus serial I/O has
complete autonomy in byte handling and supports all four
I2C-bus operating modes:
• Master transmitter
• Master receiver
• Slave transmitter
• Slave receiver.
The I2C-bus block contains 4 SFR registers. The mode of
operation is controlled by the S1CON register. S1STA is
the status register whose contents may also be used as a
vector to various service routines. S1DAT is the data shift
register and S1ADR is the slave address register. Slave
address recognition is performed by hardware.
An application note is available to help implementation of
the software for the I2C-bus.
handbook, full pagewidth
MGM777
S1ADR
DATA SHIFT REGISTER
S1DAT
SDA
BUS ARBITRATION LOGIC
SCL
BUS CLOCK GENERATOR
S1CON
SERIAL CONTROL REGISTER
STATUS REGISTER
OWN ADDRESS REGISTER
S1STA
Fig.13 I2C-bus serial I/O.



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