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ALT80800KLPATR bảng dữ liệu(PDF) 6 Page - Allegro MicroSystems

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Giải thích chi tiết về linh kiện  Automotive-Grade, Constant-Current 2.0 A PWM Dimmable Synchronous Buck LED Driver
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nhà sản xuất  ALLEGRO [Allegro MicroSystems]
Trang chủ  http://www.allegromicro.com
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Automotive-Grade, Constant-Current 2.0 A
PWM Dimmable Synchronous Buck LED Driver
ALT80800
6
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Characteristics
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
ANALOG DIMMING INPUT
Input Voltage for 100% LED Current
VADIMH
VCSH – VCSL = VCSREG
2.1
–
–
V
Regulation Threshold at 50% Analog
Dimming
VCSREG50 VADIM = 1.0 V
–
100
–
mV
Regulaton Threshold at 20% Analog
Dimming
VCSREG20 VADIM = 0.4 V
38.4
40
41.4
mV
FAULT
LED Open/Short Detect Condition
ADIM Range
VADIM rising
244
264
284
mV
LED Short Fault Output Voltage Low
Threshold
VOUT falling
1.3
1.5
1.7
V
LED Open-Fault Enable Reference
VREF1
2.352
2.4
2.448
V
LED Open Fault Current Threshold
VCS_OPEN
VCSREG = 200 mV start falling (PWM duty =
max), VADIM = VCC, VFDSET = VCC
(20 mV)
10%
(50 mV)
25%
(80 mV)
40%
–
LED Open Fault Current Hysteresis [1]
VCS_OPEN_HYS
VCSREG = 200 mV start falling (PWM duty =
max), VADIM = VCC, VFDSET = VCC
(6 mV)
3%
(12 mV)
6%
(18 mV)
9%
–
Fault Deglitch Timer
tFDG
35
50
65
µs
Fault Mask Timer
tMASK
70
100
130
µs
FFn Pull-Down Voltage
VFAULT(PD) Fault condition asserted, pull-up current = 1 mA
–
–
0.4
V
FFn Pin Leakage Current
IFAULT(LKG) Fault condition cleared, pull-up to 5 V
–
–
1
µA
FFn Rising Time [1]
tRISE
The transition time FFn pin takes from Low
to High
–
–
10
µs
FFn Falling Time [1]
tFALL
The transition time FFn pin takes from High
to Low
–
–
10
µs
Cool Down Timer for Fault Retry
tRETRY
–
1
–
ms
THERMAL SHUTDOWN
Thermal Shutdown Threshold[1]
TSD
150
165
180
°C
Thermal Shutdown Hysteresis
TSDHYS
–
25
–
°C
[1]
Determined by design and characterization. Not production tested.
[2]
Guaranteed by design, HS and LS switches are interlocked, as illustrated below:
tdead
tLS_ONmin
SW
Low Side VGS
tdead
tOFFmin
tdead ≈
(tOFFMIN – tLS_ONmin) / 2
[3]
In test mode, a ramp signal is applied between CSH and CSL pins to determine the VCSH – VCSL regulation threshold voltage. In actual application,
the average VCSH – VCSL voltage is regulated at VCSREG regardless of ripple voltage.
[4]
Negative current is defined as coming out of (sourcing) the specified device pin or node.
ELECTRICAL CHARACTERISTICS (continued): Valid at VIN = 12 V, VOUT = 6 V, TJ = –40°C to 125°C, typical values at
TJ = 25°C, unless otherwise noted



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