MPC866P datasheet(72/92 Pages) FREESCALE

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MPC866/859 Hardware Speciﬁcations

MOTOROLA

FEC Electrical Characteristics

This section provides the AC electrical speciﬁcations for the fast Ethernet controller (FEC). Note that the

timing speciﬁcations for the MII signals are independent of system clock frequency (part speed

designation). Also, MII signals use TTL signal levels compatible with devices operating at either 5.0 or 3.3

14.1

MII Receive Signal Timing (MII_RXD [3:0], MII_RX_DV,

MII_RX_ER, MII_RX_CLK)

The receiver functions correctly up to a MII_RX_CLK maximum frequency of 25 MHz + 1%. There is no

minimum frequency requirement. In addition, the processor clock frequency must exceed the

MII_RX_CLK frequency – 1%. Table 33 shows the timings for MII receive signal.

Figure 74 shows the timings for MII receive signal.

Figure 74. MII Receive Signal Timing Diagram

14.2

MII Transmit Signal Timing (MII_TXD[3:0], MII_TX_EN,

MII_TX_ER, MII_TX_CLK)

The transmitter functions correctly up to a MII_TX_CLK maximum frequency of 25 MHz +1%. There is

no minimum frequency requirement. In addition, the processor clock frequency must exceed the

MII_TX_CLK frequency - 1%.

Table 33. MII Receive Signal Timing

Num

Characteristic

Min

Max

Unit

MII_RXD[3:0], MII_RX_DV, MII_RX_ER to MII_RX_CLK setup

—

MII_RX_CLK to MII_RXD[3:0], MII_RX_DV, MII_RX_ER hold

—

MII_RX_CLK pulse width high

35%

65%

MII_RX_CLK period

MII_RX_CLK pulse width low

35%

65%

MII_RX_CLK period

MII_RX_CLK (input)

MII_RXD[3:0] (inputs)

MII_RX_DV

MII_RX_ER

Freescale Semiconductor, Inc.

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