ADM1266ACPZ-R7 datasheet(52/62 Pages) AD

52 / 62 page

ADM1266

Data Sheet

Rev. A | Page 52 of 62

Table 79. PDIO_IN_STATUS and PDIO_OUT_STATUS Mapping

Bit

Field

Description

PDIO1_IN/OUT_STATUS

PDIO1 input/output status

PDIO2_IN/OUT_STATUS

PDIO2 input/output status

PDIO3_IN/OUT_STATUS

PDIO3 input/output status

PDIO4_IN/OUT_STATUS

PDIO4 input/output status

PDIO5_IN/OUT_STATUS

PDIO5 input/output status

PDIO6_IN/OUT_STATUS

PDIO6 input/output status

PDIO7_IN/OUT_STATUS

PDIO7 input/output status

PDIO8_IN/OUT_STATUS

PDIO8 input/output status

PDIO9_IN/OUT_STATUS

PDIO9 input/output status

PDIO10_IN/OUT_STATUS

PDIO10 input/output status

PDIO11_IN/OUT_STATUS

PDIO11 input/output status

PDIO12_IN/OUT_STATUS

PDIO12 input/output status

PDIO13_IN/OUT_STATUS

PDIO13 input/output status

PDIO14_IN/OUT_STATUS

PDIO14 input/output status

PDIO15_IN/OUT_STATUS

PDIO15 input/output status

PDIO16_IN/OUT_STATUS

PDIO16 input/output status

SET_RTC

This command reads/writes the timestamp from/to the device by the GUI.

Table 80. Register 0xDF—SET_RTC

Byte

Bit Name

R/W

Description

Data length

Block R/W

Size of data for this block read/write, fixed to 6.

[7:1]

Data

Block R/W

6-byte timestamp message.

LOGIC_CONFIGURATION

This command block reads/writes the logic configuration for the device.

Table 81. Register 0xE0—LOGIC_CONFIGURATION (for Block WR)

Byte

Bit Name

R/W

Description

Parameter length

Block W

Parameter data length, fixed to 3.

Data length

Block W

Data length.

Offset address (low)

Block W

The low 8-bit offset address of total logic data.

Offset address (high)

Block W

The high 8-bit offset address of total logic data.

Data length

Block R

Readback logic data length, maximum value of N = 252. N must be a multiple value of 4.

[252:1]

Data

Block R

Logic data.

Table 82. Register 0xE0—LOGIC_CONFIGURATION (for Block W)

Byte

Bit Name

R/W

Description

Data length

Block W

Number of bytes of data for this block write.

Offset address (low)

Block W

The low 8-bit offset address of total logic data.

Offset address (high)

Block W

The high 8-bit offset address of total logic data.

[250:3]

Data

Block W

Data for logic data, max value of N = 250. N − 3 + 1 must be a multiple value of 4.

ADM1266ACPZ-R7 bảng dữ liệu(PDF) 52 Page - Analog Devices

ADM1266ACPZ-R7 bảng dữ liệu(HTML) 52 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62

bảng dữ liệu tải về

Link URL