SSM3515CCBZ-R7 datasheet(6/41 Pages) AD

6 / 41 page

SSM3515

Data Sheet

Rev. A| Page 6 of 41

DIGITAL TIMING CHARACTERISTICS

All timing specifications are given for the default setting (I2S mode) of the serial input port.

Table 5. I2C Port Timing

Limit

Parameter

Min

Max

Unit

Description

I2C PORT

fSCL

400

kHz

SCL frequency

tSCLH

0.6

µs

SCL high

tSCLL

1.3

µs

SCL low

tSCS

0.6

µs

Setup time; relevant for repeated start condition

tSCH

0.6

µs

Hold time; after this period, the first clock is generated

tDS

100

Data setup time

tSCR

300

SCL rise time

tSCF

300

SCL fall time

300

SDA rise time, not shown in Figure 2

300

SDA fall time, not shown in Figure 2

tBFT

0.6

µs

Bus-free time (time between stop and start)

tHOLD

140

SCL falling to SDA rising

SCL falling to SDA falling

Table 6. Digital Input Timing

Limit

Parameter

TMIN

TMAX

Unit

Description

SERIAL PORT

tBIL

BCLK low pulse width

tBIH

BCLK high pulse width

tSIS

SDATA setup, time to BCLK rising

tSIH

SDATA hold, time from BCLK rising

tLIS

FSYNC setup time to BCLK rising

tLIH

FSYNC hold time to BCLK rising

tBP

Minimum BCLK period

Digital Timing Diagrams

tSCH

tSCS

tBFT

tSCF

tDS

tSCLL

tHOLD

tSCR

tSCLH

tSCH

STOP

CONDITION

START

CONDITION

SDA

SCL

Figure 2. I2C Port Timing

SSM3515CCBZ-R7 bảng dữ liệu(PDF) 6 Page - Analog Devices

SSM3515CCBZ-R7 bảng dữ liệu(HTML) 6 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41

bảng dữ liệu tải về

Link URL