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SCD1284 bảng dữ liệu(PDF) 116 Page - Intel Corporation |
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SCD1284 bảng dữ liệu(HTML) 116 Page - Intel Corporation |
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116 / 176 page ![]() CD1284 — IEEE 1284-Compatible Parallel Interface Controller 116 Datasheet provides the character. It is not necessary to read either of these values. If the service acknowledge is terminated without reading the exception status and data from the RDSR, the internal processor updates the FIFO pointers as if the status/data were read. The same is true when only the status is read. Overrun errors are an exception to this (see table below). 7.2.5 Receive Interrupt Vector Register The value in this register is placed on the data bus, DB[7:0], when SVCACKR* is activated in response to an active SVCREQR*. See Section 7.4.6 on page 128 for more details on the LIVR. Bit Description 7 Timeout: If the service request enable for timeout is set, this bit indicates that no data has been received within the receive timeout period set by the RTPR after the last character was removed. 6:4 Special Character Detect: These three bits are encoded as follows: NOTE: No special character matching is performed if either a parity (PE) or framing (FE) error occur unless CMOE is enabled by COR5[5]. 3 Break: Indicates that a break was detected. 2 Parity Error: Indicates that a character was received with parity other than that programmed in COR1. 1 Framing Error: Indicates that the character was received with a bad stop bit. 0 Overrun Error: This bit is set if new data is received, but there is no space available in the FIFO and Holding register. In this case, the character data is lost, and the overrun flag is applied to the last good data received before the overrun occurred. Thus, the character read on the subsequent read from the RDSR is good data and should not be discarded. Register Name: RIVR Register Description: Receive Interrupt Vector Access: Read only 8-Bit Hex Address: 43 Default Value: 00 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 X XXX X IT2 IT1 IT0 SCDet2 SCDet1 SCDet0 Status 0 0 0 None detected. 0 0 1 Special character 1 matched. 0 1 0 Special character 2 matched. 0 1 1 Special character 3 matched. 1 0 0 Special character 4 matched. 1 0 1 Not used. 1 1 0 End-of-break detected. 1 1 1 Range detect. IT2 IT1 IT0 Description 0 0 0 No receive interrupt active. 00 1 Invalid. 01 0 |
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