AD9144BCPZ datasheet(22/125 Pages) AD

22 / 125 page

AD9144

Data Sheet

Rev. B | Page 22 of 125

SERIAL PORT OPERATION

The serial port is a flexible, synchronous serial communications

port that allows easy interfacing with many industry-standard

microcontrollers and microprocessors. The serial input/output

(I/O) is compatible with most synchronous transfer formats,

including both the Motorola SPI and Intel® SSR protocols. The

interface allows read/write access to all registers that configure

the AD9144. MSB first or LSB first transfer formats are supported.

The serial port interface can be configured as a 4-wire interface

or a 3-wire interface in which the input and output share a single-

pin I/O (SDIO).

SCLK

SDIO

SDO

SPI

PORT

Figure 30. Serial Port Interface Pins

There are two phases to a communication cycle with the AD9144.

Phase 1 is the instruction cycle (the writing of an instruction

byte into the device), coincident with the first 16 SCLK rising

edges. The instruction word provides the serial port controller

with information regarding the data transfer cycle, Phase 2 of

the communication cycle. The Phase 1 instruction word defines

whether the upcoming data transfer is a read or write, along with

the starting register address for the following data transfer.

A logic high on the CS pin followed by a logic low resets the

serial port timing to the initial state of the instruction cycle.

From this state, the next 16 rising SCLK edges represent the

instruction bits of the current I/O operation.

The remaining SCLK edges are for Phase 2 of the communication

cycle. Phase 2 is the actual data transfer between the device and

the system controller. Phase 2 of the communication cycle is a

transfer of one or more data bytes. Eight × N SCLK cycles are

needed to transfer N bytes during the transfer cycle. Registers

change immediately upon writing to the last bit of each transfer

byte, except for the frequency tuning word (FTW) and numerically

controlled oscillator (NCO) phase offsets, which change only when

the frequency tuning word FTW_UPDATE_REQ bit is set.

DATA FORMAT

The instruction byte contains the information shown in Table 13.

Table 13. Serial Port Instruction Word

I[15] (MSB)

I[14:0]

R/W

A[14:0]

R/W, Bit 15 of the instruction word, determines whether a read

or a write data transfer occurs after the instruction word write.

Logic 1 indicates a read operation, and Logic 0 indicates a write

operation.

A14 to A0, Bit 14 to Bit 0 of the instruction word, determine the

communication cycle. For multibyte transfers, A[14:0] is the

starting address. The remaining register addresses are generated

by the device based on the ADDRINC bit. If ADDRINC is set

high (Register 0x000, Bit 5 and Bit 2), multibyte SPI writes start

on A[14:0] and increment by 1 every 8 bits sent/received. If

ADDRINC is set to 0, the address decrements by 1 every 8 bits.

SERIAL PORT PIN DESCRIPTIONS

Serial Clock (SCLK)

The serial clock pin synchronizes data to and from the device

and runs the internal state machines. The maximum frequency

of SCLK is 10 MHz. All data input is registered on the rising edge

of SCLK. All data is driven out on the falling edge of SCLK.

Chip Select (CS)

An active low input starts and gates a communication cycle.

CS allows more than one device to be used on the same serial

communications lines. The SDIO pin goes to a high impedance

state when this input is high. During the communication cycle,

chip select must stay low.

Serial Data I/O (SDIO)

This pin is a bidirectional data line. In 4-wire mode, this pin

acts as the data input, and SDO acts as the data output.

SERIAL PORT OPTIONS

The serial port can support both MSB first and LSB first data

formats. This functionality is controlled by the LSBFIRST bit

(Register 0x000, Bit 6 and Bit 1). The default is MSB first

(LSBFIRST = 0).

When LSBFIRST = 0 (MSB first), the instruction and data bits

must be written from MSB to LSB. R/W is followed by A[14:0]

as the instruction word, and D[7:0] is the data-word. When

LSBFIRST = 1 (LSB first), the opposite is true. A[0:14] is

followed by R/W, which is subsequently followed by D[0:7].

The serial port supports a 3-wire or 4-wire interface. When

SDOACTIVE = 1 (Register 0x000, Bit 4 and Bit 3), a 4-wire

interface with a separate input pin (SDIO) and output pin

(SDO) is used. When SDOACTIVE = 0, the SDO pin is unused

and the SDIO pin is used for both input and output.

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