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LPC802 bảng dữ liệu(PDF) 67 Page - NXP Semiconductors |
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LPC802 bảng dữ liệu(HTML) 67 Page - NXP Semiconductors |
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67 / 83 page ![]() LPC802 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved. Product data sheet Rev. 1.6 — 27 April 2018 67 of 83 NXP Semiconductors LPC802 32-bit ARM Cortex-M0+ microcontroller 15.4 Termination of unused pins Table 31 shows how to terminate pins that are not used in the application. In many cases, unused pins may should be connected externally or configured correctly by software to minimize the overall power consumption of the part. Unused pins with GPIO function should be configured as outputs set to LOW with their internal pull-up disabled. To configure a GPIO pin as output and drive it LOW, select the GPIO function in the IOCON register, select output in the GPIO DIR register, and write a 0 to the GPIO PORT register for that pin. Disable the pull-up in the pin’s IOCON register. In addition, it is recommended to configure all GPIO pins that are not bonded out on smaller packages as outputs driven LOW with their internal pull-up disabled. [1] I = Input, O = Output, IA = Inactive (no pull-up/pull-down enabled), F = floating, PU = Pull-Up. 15.5 Pin states in different power modes [1] Default and programmed pin states are retained in sleep, deep-sleep, and power-down modes. Table 31. Termination of unused pins Pin Default state[1] Recommended termination of unused pins all PIOn_m I; PU Can be left unconnected if driven LOW and configured as GPIO output with pull-up disabled by software. VREFP - Tie to VDD. Table 32. Pin states in different power modes Pin Active Sleep Deep-sleep/power- down Deep power-down PIOn_m pins As configured in the IOCON[1]. Default: internal pull-up enabled. Floating. RESET Reset function enabled. Default: input, internal pull-up enabled. Reset function disabled; floating; if the part is in deep power-down mode. |
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