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LPC81xM bảng dữ liệu(HTML) 4 Page - NXP Semiconductors |
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4 / 78 page  LPC81XM All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved. Product data sheet Rev. 4.6 — 4 April 2018 4 of 78 NXP Semiconductors LPC81xM 32-bit ARM Cortex-M0+ microcontroller 5. Marking The LPC81xM devices typically have the following top-side marking: LPC81x xxxxx xxxxxxxx xxYWWxR[x] The last two letters in the last line (field ‘xR’) identify the boot code version and device revision. Field ‘Y’ states the year the device was manufactured. Field ‘WW’ states the week the device was manufactured during that year. Remark: On the TSSOP16 package, the last line includes only the date code xxYWW. Table 3. Device revision table Revision identifier (xR) Revision description ‘1A’ Initial device revision with boot code version 13.1 ‘2A’ Device revision with boot code version 13.2 ’4C’ Device revision with boot code version 13.4 |
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