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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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KMB-001LEVALZ bảng dữ liệu(PDF) 29 Page - Renesas Technology Corp |
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KMB-001LEVALZ bảng dữ liệu(HTML) 29 Page - Renesas Technology Corp |
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29 / 34 page  ISLA214P12 FN7982 Rev 2.00 Page 29 of 34 June 27, 2012 SPI Memory Map ADDR. (Hex) PARAMETER NAME BIT 7 (MSB) BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 (LSB) DEF. VALUE (HEX) 00 Port_config SDO Active LSB First Soft Reset Mirror (bit5) Mirror (bit6) Mirror (bit7) 00h 01 Reserved Reserved 02 Burst_end Burst end address [7:0] 00h 03-07 Reserved Reserved 08 Chip_id Chip ID # Read only 09 Chip_version Chip Version # Read only 0A-0F Reserved Reserved 10-1F Reserved Reserved 20 Offset_coarse_adc0 Coarse Offset cal. value 21 Offset_fine_adc0 Fine Offset cal. value 22 Gain_coarse_adc0 Reserved Coarse Gain cal. value 23 Gain_medium_adc0 Medium Gain cal. value 24 Gain_fine_adc0 Fine Gain cal. value 25 Modes_adc0 Reserved Power Down Mode ADC0 [2:0] 000 = Pin Control 001 = Normal Operation 010 = Nap 100 = Sleep Other codes = Reserved 00h NOTresetbySoft Reset 26 Offset_coarse_adc1 Coarse Offset cal. value 27 Offset_fine_adc1 Fine Offset cal. value 28 Gain_coarse_adc1 Reserved Coarse Gain cal. value 29 Gain_medium_adc1 Medium Gain cal. value 2A Gain_fine_adc1 Fine Gain cal. value 2B Modes_adc1 Reserved Power Down Mode ADC1 [2:0] 000 = Pin Control 001 = Normal Operation 010 = Nap 100 = Sleep Other codes = Reserved 00h NOTresetbySoft Reset 2C-2F Reserved Reserved 33-4A Reserved Reserved 4B Reserved Reserved Read only 4C Reserved Reserved Read only 4D Reserved Enable PD Reset Divider [2:0] Select 00h 4E-6F Reserved Reserved 70 Skew_diff Differential Skew 80h 71 Phase_slip Reserved Next Clock Edge 00h 72 Clock_divide Clock Divide [2:0] 000 = Pin Control 001 = divide by 1 010 = divide by 2 100 = divide by 4 Other codes = Reserved 00h NOTresetbySoft Reset 73 Output_mode_A Output Mode [7:5] 000 = LVDS 3mA (Default) 001 = LVDS 2mA 100 = LVCMOS Other codes = Reserved Output Format [2:0] 000 = Two’s Complement (Default) 010 = Gray Code 100 = Offset Binary Other codes = Reserved 00h NOTresetbySoft Reset 74 Output_mode_B DLL Range 0 = Fast 1 = Slow Default=’0’ DDR Enable 00h NOTresetbySoft Reset 75-B5 Reserved Reserved |
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