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ICL7660AIBA bảng dữ liệu(PDF) 8 Page - Renesas Technology Corp |
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ICL7660AIBA bảng dữ liệu(HTML) 8 Page - Renesas Technology Corp |
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8 / 11 page ![]() ICL7660, ICL7660A FN3072 Rev.7.00 Page 8 of 11 Oct 5, 2010 Typical Applications Simple Negative Voltage Converter The majority of applications will undoubtedly utilize the ICL7660 and ICL7660A for generation of negative supply voltages. Figure 13 shows typical connections to provide a negative supply negative (GND) for supply voltages below 3.5V. The output characteristics of the circuit in Figure 13A can be approximated by an ideal voltage source in series with a resistance as shown in Figure 13B. The voltage source has a value of -V+. The output impedance (RO) is a function of the ON resistance of the internal MOS switches (shown in Figure 12), the switching frequency, the value of C1 and C2, and the ESR (equivalent series resistance) of C1 and C2. A good first order approximation for RO is: RSW, the total switch resistance, is a function of supply voltage and temperature (See the Output Source Resistance graphs), typically 23 at 25°C and 5V. Careful selection of C1 and C2 will reduce the remaining terms, minimizing the output impedance. High value capacitors will reduce the 1/(fPUMP C1) component, and low ESR capacitors will lower the ESR term. Increasing the oscillator frequency will reduce the 1/(fPUMP C1) term, but may have the side effect of a net increase in output impedance when C1 > 10F and there is no longer enough time to fully charge the capacitors every cycle. FIGURE 14. OUTPUT RIPPLE FIGURE 15. PARALLELING DEVICES FIGURE 16. CASCADING DEVICES FOR INCREASED OUTPUT VOLTAGE A t2 t1 B 0 -(V+) V 1 2 3 4 8 7 6 5 ICL7660 V+ C1 ICL7660A 1 2 3 4 8 7 6 5 ICL7660 C1 ICL7660A RL + - C2 “n” “1” 1 2 3 4 8 7 6 5 V+ 1 2 3 4 8 7 6 5 + - 10 F + - 10 F + - 10 F + - 10 F VOUT = -nV+ ICL7660 ICL7660A “n” ICL7660 ICL7660A “1” RO 2(RSW1 + RSW3 + ESRC1) + 2(RSW2 + RSW4 + ESRC1) + 1 + ESRC2 (fPUMP) (C1) (fPUMP = fOSC , RSWX = MOSFET switch resistance) 2 Combining the four RSWX terms as RSW, we see that: RO 2 (RSW) + 1 + 4 (ESRC1) + ESRC2 (fPUMP) (C1) RO 2(RSW1 + RSW3 + ESRC1) + |
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