ICL7660AIBA datasheet(7/11 Pages) RENESAS

7 / 11 page

ICL7660, ICL7660A

FN3072 Rev.7.00

Page 7 of 11

Oct 5, 2010

The voltage regulator portion of the ICL7660 and ICL7660A is an

integral part of the anti-latchup circuitry, however its inherent

voltage drop can degrade operation at low voltages. Therefore, to

improve low voltage operation the “LV” pin should be connected to

GROUND, disabling the regulator. For supply voltages greater

than 3.5V the LV terminal must be left open to insure latchup proof

operation, and prevent device damage.

Theoretical Power Efficiency

Considerations

In theory a voltage converter can approach 100% efficiency if

certain conditions are met.

1. The driver circuitry consumes minimal power.

2. The output switches have extremely low ON resistance and

virtually no offset.

3. The impedances of the pump and reservoir capacitors are

negligible at the pump frequency.

The ICL7660 and ICL7660A approach these conditions for

negative voltage conversion if large values of C1 and C2 are

used.

ENERGY IS LOST ONLY IN THE TRANSFER OF CHARGE

BETWEEN CAPACITORS IF A CHANGE IN VOLTAGE

OCCURS. The energy lost is defined by:

E = 1/2 C1 (V12 - V22)

where V1 and V2 are the voltages on C1 during the pump and

transfer cycles. If the impedances of C1 and C2 are relatively

high at the pump frequency (refer to Figure 12) compared to the

value of RL, there will be a substantial difference in the voltages

V1 and V2. Therefore it is not only desirable to make C2 as large

as possible to eliminate output voltage ripple, but also to employ

a correspondingly large value for C1 in order to achieve

maximum efficiency of operation.

Do’s And Don’ts

1. Do not exceed maximum supply voltages.

2. Do not connect LV terminal to GROUND for supply voltages

greater than 3.5V.

3. Do not short circuit the output to V+ supply for supply

voltages above 5.5V for extended periods, however,

transient conditions including start-up are okay.

4. When using polarized capacitors, the + terminal of C1 must

be connected to pin 2 of the ICL7660 and ICL7660A and the

+ terminal of C2 must be connected to GROUND.

5. If the voltage supply driving the ICL7660 and ICL7660A has

a large source impedance (25

 - 30), then a 2.2F

capacitor from pin 8 to ground may be required to limit rate

of rise of input voltage to less than 2V/

s.

6. User should insure that the output (pin 5) does not go more

positive than GND (pin 3). Device latch up will occur under

these conditions. A 1N914 or similar diode placed in parallel

with C2 will prevent the device from latching up under these

conditions. (Anode pin 5, Cathode pin 3).

VOUT = -VIN

VIN

FIGURE 12. IDEALIZED NEGATIVE VOLTAGE CONVERTER

FIGURE 13A. CONFIGURATION

FIGURE 13B. THEVENIN EQUIVALENT

FIGURE 13. SIMPLE NEGATIVE CONVERTER

F

ICL7660

VOUT = -V+

V+

F

ICL7660A

V+

VOUT

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