OXCB950 datasheet(5/68 Pages) ETC

tên linh kiện	OXCB950

Giải thích chi tiết về linh kiện	Integrated High Performance UART Cardbus / PCI interface

PDF	68 Pages

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nhà sản xuất	ETC [List of Unclassifed Manufacturers]

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5 / 68 page

Data Sheet Revision 1.1

Page 5

OXCB950

OXFORD SEMICONDUCTOR LTD.

A ‘wake-up’ event (the ‘power management event’) is requested via the PME# (PCI) or CSYSCHG (cardbus) pins from either of

the power states D2 or D3, by the UART line RI (for power state D3), and any modem line and the Serial Data In (for power state

D2).

Optional EEPROM:

The OXCB950 can be reconfigured from an external MicrowireTM based EEPROM. However, this is not required in many

applications as default values are provided for typical applications. Features available via the use of the EEPROM include

redefining device ID’s and vendor/sub-vendor ID fields in the PCI header space, cardbus-to-pci mode change, redefining Tuple

Information (relevant to cardbus applications only), and selectively enabling/disabling interrupts, powerdown and wakeup

requests.

2 BLOCK DIAGRAM

PCI

3.3V or

CardBus

Interface

AD[31:0]

C/BE[3:0]

CLK

FRAME#

DEVSEL#

IRDY#

TRDY#

STOP#

PAR

SERR#

PERR#

RST#

IDSEL

INTA#

INTB#

PME#

Clock &

Baud rate

Generator

XTALO

XTALI

EEPROM

interface

EE_DO

EE_DI

EE_CK

EE_CS

Function 0

Interrupt logic

UART

MIO pins

SOUT

SIN

RTS

DTR

CTS

DSR

DCD

MIO[1:0]

SLEW_RATE

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