SAFC161RI datasheet(57/60 Pages) SIEMENS

57 / 60 page

Semiconductor Group

1998-05-01

C161RI

AC Characteristics

CLKOUT and READY

DD = 4.5 - 5.5 V;

SS = 0 V

A = 0 to + 70 °C

for SAB-C161RI

A = – 40 to + 85 °C

for SAF-C161RI

L = 100 pF

Notes

1) These timings are given for test purposes only, in order to assure recognition at a specific clock edge.

2) Demultiplexed bus is the worst case. For multiplexed bus 2TCL are to be added to the maximum values. This

adds even more time for deactivating READY.

The 2tA and tC refer to the next following bus cycle, tF refers to the current bus cycle.

Parameter

Symbol

Max. CPU Clock

= 16 MHz

Variable CPU Clock

1/2TCL = 1 to 16 MHz

Unit

min.

max.

min.

max.

CLKOUT cycle time

2TCL

CLKOUT high time

–

TCL – 6

–

CLKOUT low time

–

TCL – 10

–

CLKOUT rise time

–4–

CLKOUT fall time

–4–

CLKOUT rising edge to

ALE falling edge

0 +

10 +

0 +

10 +

Synchronous READY

setup time to CLKOUT

–

Synchronous READY

hold time after CLKOUT

4–4

–

Asynchronous READY

low time

–

2TCL + 14

–

Asynchronous READY

setup time 1)

–

Asynchronous READY

hold time 1)

4–4

–

Async. READY hold time

after RD, WR high

(Demultiplexed Bus) 2)

+ 2

A + tC

0TCL - 30

+ 2

A + tC + tF

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