LM12434CIWM datasheet(6/80 Pages) NSC

6 / 80 page

20 Electrical Specifications (Continued)

221 Converter Static Characteristics

The following specifications apply to the LM12434 and LM12 L 438 for VAa e

VDa e 5V 33V AGND e DGND e 0V VREFa e 4096V 25V VREFb e 0V 12-bit a sign conversion mode fCLK e

80 MHz

6 MHz

RS e 25X source impedance for VREFa and VREFb s 25X fully-differential input with fixed 2048V

125V common-mode voltage and minimum acquisition time unless otherwise specified Boldface limits apply for TA e

TJ e TMIN to TMAX all other limits TA e TJ e 25 C (Notes 6 7 8 and 9) (Continued)

Symbol

Parameter

Conditions

Typical

Limits

Units

(Note 10)

(Note 11)

(Limit)

DNL

8-Bit a Sign and ‘‘Watchdog’’ Mode

015

LSB (max)

Differential Non-Linearity

8-Bit a Sign and ‘‘Watchdog’’ Mode

After Auto-Zero

005

LSB (max)

Zero Error

8-Bit a Sign and ‘‘Watchdog’’ Positive

LSB (max)

and Negative Full-Scale Error

8-Bit a Sign and ‘‘Watchdog’’ Mode

LSB

DC Common Mode Error

Multiplexer Channel-to-Channel

005

LSB

Matching

VINa

Non-Inverting

GND

V (min)

Input Range

VAa

V (max)

VINb

Inverting

GND

V (min)

Input Range

VAa

V (max)

VINa b VINb Differential Input Voltage Range

VAa

V (min)

VAa

V (max)

VINa b VINb

Common Mode Input Voltage Range

GND

V (min)

VAa

V (max)

PSS

Power Supply

Zero Error VAa e VDa e 5V g10%

005

LSB (max)

Sensitivity

Full-Scale Error VREFa e 4096V VREFb e GND

025

LSB (max)

(Note 15)

Linearity Error

LSB

CREF

VREFa VREFb Input Capacitance

CIN

Selected Multiplexer Channel Input

Capacitance

222 Converter Dynamic Characteristics

The following specifications apply only to the LM12434 and LM12438 for VAa e

VDa e 5V AGND e DGND e 0V VREFa e 4096V VREFb e 0V 12-bit a sign conversion mode fCLK e 80 MHz

throughput rate e 1333 kHz RS e 25X source impedance for VREFa and VREFb s 25X fully-differential input with fixed

2048V 125V common-mode voltage and minimum acquisition time unless otherwise specified Boldface limits apply

for TA e TJ e TMIN to TMAX all other limits TA e TJ e 25 C (Notes 6 7 8 and 9)

Symbol

Parameter

Conditions

Typical

Limits

Units

(Note 10)

(Note 11)

(Limit)

CLK Duty Cycle

% (min)

% (max)

Conversion Time

13-Bit Resolution

44 (tCLK)

44 (tCLK) a 50 ns

(max)

Sequencer State S5

(Figure 10)

9-Bit Resolution

21 (tCLK)

21 (tCLK) a 50 ns

(max)

Sequencer State S5

(Figure 10)

Acquisition Time

Sequencer State S7

(Figure 10)

tCLK e CLK Period

(Programmable)

Minimum for 13-Bits

9 (tCLK)

9(tCLK) a 50 ns

(max)

Maximum for 13-Bits (D e 15)

39 (tCLK)

39 (tCLK) a 50 ns

(max)

Minimum for 9-Bits

(Figure 10)

2(tCLK)

2(tCLK) a 50 ns

(max)

Maximum for 9-Bits (D e 15)

2 (tCLK)

32 (tCLK) a 50 ns

(max)

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