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MB95F856K bảng dữ liệu(PDF) 7 Page - Cypress Semiconductor |
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MB95F856K bảng dữ liệu(HTML) 7 Page - Cypress Semiconductor |
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7 / 172 page ![]() Document Number: 002-09305 Rev. *C Page 7 of 172 PRELIMINARY MB95F856K, MB95F866K, MB95F876K 1. Product Line-up Parameter MB95F856K MB95F866K MB95F876K Type Flash memory product Clock supervisor counter It supervises the main clock oscillation and the subclock oscillation. Flash memory capacity 36 Kbyte RAM capacity 1 Kbyte Power-on reset Yes Low-voltage detection reset Yes Reset input Selected through software CPU functions •Number of basic instructions: 136 • Instruction bit length: 8 bits • Instruction length: 1 to 3 bytes • Data bit length: 1, 8 and 16 bits • Minimum instruction execution time: 61.5 ns (machine clock frequency = 16.25 MHz) • Interrupt processing time: 0.6 µs (machine clock frequency = 16.25 MHz) General-purpose I/O • I/O port:21 • CMOS I/O:17 • N-ch open drain:4 • I/O port:29 • CMOS I/O:25 • N-ch open drain:4 • I/O port:45 • CMOS I/O:41 • N-ch open drain:4 Time-base timer Interval time: 0.256 ms to 8.3 s (external clock frequency = 4 MHz) Hardware/software watchdog timer • Reset generation cycle - Main oscillation clock at 10 MHz: 105 ms (Min) • The sub-CR clock can be used as the source clock of the software watchdog timer. Wild register It can be used to replace three bytes of data. 8/10-bit A/D converter 4 channels 6 channels 8 channels 8-bit or 10-bit resolution can be selected. 8/16-bit composite timer 1 channel 2 channels 2 channels • The timer can be configured as an “8-bit timer × 2 channels” or a “16-bit timer × 1 channel”. • It has the following functions: interval timer function, PWC function, PWM function and input capture function. • Count clock: it can be selected from internal clocks (seven types) and external clocks. • It can output square wave. External interrupt 6 channels 8 channels 10 channels Interrupt by edge detection (The rising edge, falling edge, and both edges can be selected.) It can be used to wake up the device from different standby modes. On-chip debug • 1-wire serial control • It supports serial writing (asynchronous mode). UART/SIO 1 channel • Data transfer with UART/SIO is enabled. • It has a full duplex double buffer, variable data length (5/6/7/8 bits), an internal baud rate generator and an error detection function. • It uses the NRZ type transfer format. • LSB-first data transfer and MSB-first data transfer are available to use. • Both clock asynchronous (UART) serial data transfer and clock synchronous (SIO) serial data transfer are enabled. |
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