AD9675KBCZ datasheet(60/61 Pages) AD

60 / 61 page

Data Sheet

AD9675

Rev. A | Page 59 of 60

MEMORY MAP REGISTER DESCRIPTIONS

For more information about the SPI memory map and other

functions, see the AN-877 Application Note, Interfacing to High

Speed ADCs via SPI.

Transfer (Register 0x0FF)

All registers except Register 0x002 are updated as soon as they

are written. Writing to Register 0x0FF (the value written is don’t

care) initializes and updates the speed mode (Address 0x002)

and resets all other registers to their default values (analog and

ADC registers only, and not JESD204B registers, Register 0x000,

or Register 0x002). Set the speed mode in Register 0x002 and

write to Register 0x0FF at the beginning of the setup of the SPI

writes after the device is powered up to avoid rewriting other

registers after Register 0x0FF is written.

Profile Index and Software TX_TRIG (Register 0x10C)

The vector profile is selected using the profile index in

generates a TX_TRIG signal internal to the device. This signal

is asynchronous to the ADC sample clock. Therefore, do not

used this signal to align the data output or to initiate advanced

power mode across multiple devices in the system. The external

pin-driven TX_TRIG± control is recommended for systems

that require synchronization of these features across multiple

AD9675 devices.

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