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AD7294BCPZRL bảng dữ liệu(PDF) 45 Page - Analog Devices |
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AD7294BCPZRL bảng dữ liệu(HTML) 45 Page - Analog Devices |
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45 / 48 page ![]() AD7294 Data Sheet Rev. I | Page 44 of 47 GAIN CONTROL OF POWER AMPLIFIER In gain control mode, a setpoint voltage, proportional in dB to the desired output power, is applied to a power detector such as the AD8362. A sample of the output power from the power amplifier (PA), through a directional coupler and attenuator (or by other means), is fed to the input of the AD8362. The VOUT is connected to the gain control terminal of the PA, see Figure 60. Based on the defined relationship between VOUT and the RF input signal, the AD8362 adjusts the voltage on VOUT (VOUT is now an error amplifier output) until the level at the RF input corresponds to the applied VSET. The AD7294 completes a feedback loop that tracks the output of the AD8362 and adjusts the VSET input of the AD8362 accordingly. VOUT of the AD8362 is applied to the gain control terminal of the power amplifier. For this output power control loop to be stable, a ground referenced capacitor must be connected to the CLPF pin. This capacitor integrates the error signal (which is actually a current) that is present when the loop is not balanced. In a system where a variable gain amplifier (VGA) or variable voltage attenuator (VVA) feeds the power amp, only one AD8362 is required. In such a case, the gain on one of the devices (VVA, PA) is fixed and VOUT feeds the control input of the other. C5 1nF C7 0.1nF C6 0.1nF 1:4 T2 AD8362 AD7294 CLPF ENVELOPE OF TRANSMITTED SIGNAL DIRECTIONAL COUPLER ATTENUATOR POWER AMPLIFIER RF IN VIN VOUT VOUT VSET INLO INHI Figure 60. Setpoint Controller Operation |
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