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AD7294BCPZRL bảng dữ liệu(PDF) 36 Page - Analog Devices |
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AD7294BCPZRL bảng dữ liệu(HTML) 36 Page - Analog Devices |
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36 / 48 page ![]() Data Sheet AD7294 Rev. I | Page 35 of 47 SERIAL BUS ADDRESS BYTE The first byte the user writes to the device is the slave address byte. Similar to all I2C-compatible devices, the AD7294 has a 7-bit serial address. The 5 LSBs are user-programmable by the 3 three-state input pins, as shown in Table 34. In Table 34, H means tie the pin to VDRIVE, L means tie the pin to DGND, and NC refers to a pin left floating. Note that in this final case, the stray capacitance on the pin must be less than 30 pF to allow correct detection of the floating state; therefore, any PCB trace must be kept as short as possible. Table 34. Slave Address Control Using Three-State Input Pins AS2 AS1 AS0 Slave Address (A6 to A0) L L L 0x61 L L H 0x62 L L NC 0x63 L H L 0x64 L H H 0x65 L H NC 0x66 L NC L 0x67 L NC H 0x68 L NC NC 0x69 H L L 0x6A H L H 0x6B H L NC 0x6C H H L 0x6D H H H 0x6E H H NC 0x6F H NC L 0x70 H NC H 0x71 H NC NC 0x72 NC L L 0x73 NC L H 0x74 NC L NC 0x75 NC H L 0x76 NC H H 0x77 NC H NC 0x78 NC NC L 0x79 NC NC H 0x7A NC NC NC 0x7B INTERFACE PROTOCOL The AD7294 uses the following I2C protocols. Writing a Single Byte of Data to an 8-Bit Register The alert registers (0x05, 0x06, 0x07), power-down register (0x0A), channel sequence register (0x08), temperature offset registers (0x26, 0x27), and the command register (0x00) are 8-bit registers; therefore, only one byte of data can be written to each. In this operation, the master device sends a byte of data to the slave device (see Figure 51). To write data to the register, the command sequence is as follows: 1. The master device asserts a start condition. 2. The master sends the 7-bit slave address followed by a zero for the direction bit, indicating a write operation. 3. The addressed slave device asserts an acknowledge on SDA. 4. The master sends a register address. 5. The slave asserts an acknowledge on SDA. 6. The master sends a data byte. 7. The slave asserts an acknowledge on SDA. 8. The master asserts a stop condition to end the transaction. |
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