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SA4305ASAR bảng dữ liệu(PDF) 8 Page - Sames

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SPEC-3093 (REV. 2)
8/15
29-09-2017
SA4305A
feature improves the device performance in missing phase
scenarios. It also allows the device to be used in three phase
three wire meters where one channel of the device is unused.
Reverse Energy Flow Indication
The SA4305A assesses the phase difference between the
voltage and current channel signals to determine the direction
of energy flow. If the overall energy flow is negative the
reverse energy indicator is activated. This facility is designed
to detect the wrongful connection or possible tampering of the
meter. If the adder is programmed to absolute mode the
energy flow direction information is lost. The operation of the
direction output is fully described in the Output Signals
section.
Starting Current
The SA4305A generates pulses on the pulse outputs for an
input power greater than 0.02% of EMAX. This is to comply
with the IEC requirement where the meter is required to
generate pulses for currents greater than 0.4%Ib.
Power-On Reset
The SA4305A has a power-on reset circuitry that activates
whenever the voltage between VDD and VSS is less than
3.6V ± 8%.
Power Consumption
The power consumption of the SA4305A integrated circuit is
less than 50mW.
Compatibility with SA2005F
The SA4305A can be used as a functionally compatible
replacement for the SA2005F by simply leaving the pins FPM
and MS unconnected. It should however be noted that the
value of the reference resistor on the VREF pin has to be
changed from 24k
 to 47k
INPUT SIGNALS
Voltage Reference (VREF)
A bias resistor of 47k
 sets optimum bias and reference
conditions on chip. Calibration of the SA4305A should be
done on the voltage inputs and not on the VREF input.
Current Sense Inputs (IIP1/IIN1, IIP2/IIN2, IIP3/IIN3)
Figure 6 shows the typical connections for the current sensor
input for one channel. The circuit has to be repeated for the
other two channels. At maximum rated mains current (IMAX)
the resistor values should be selected for input currents of
16µARMS. The current sense inputs saturate at an input
current of ±17.6μARMS (±25μAPEAK), so this allows about 10%
headroom until saturation occurs.
The resistors RA and RB form the current transformers
termination resistor. The reference level is connected in the
centre of the termination resistor to achieve purely differential
input currents. The voltage drop across the termination
resistors at maximum rated mains current (IMAX) should be in
the order of 100mVRMS. The termination resistance should
also be significantly smaller than the DC resistance of the
current transformers secondary winding.
Figure 6: Current sense input configuration
The resistors R1 to R4 define the current flowing into the
device. For best performance the SA4305A requires anti-
alias filters on the current sense inputs. These filters are
realized by means of the capacitors C1 and C2. The typical
cut-off frequency of these filters should be between 10kHz
and 20kHz. The optimum input network is achieved by setting
the input resistors equal, i.e. setting R1 = R2 = R3 = R4 = RC.
This sets the equivalent resistance associated with each
capacitor to RC/2.
Voltage Sense Inputs (IVP1, IVP2, IVP3)
Figure 7 shows the voltage sense input configuration for one
channel. The circuit is identical for the other two channels.
The voltage sense input saturates at an input current of
±17.6μARMS (±25μAPEAK). The current into the voltage sense
input should be set at 14
μARMS at nominal mains voltage
(VNOM) to allow for a mains voltage variation of up to +25%
without saturating the voltage sense input.
Figure 7: Voltage sense input configuration
For best performance the SA4305A also requires an anti-
alias filter on the voltage sense inputs. Referring to Figure 7,
the capacitor C1 is used to both implement the anti-alias filter
as well as compensating for any phase shift caused by the
current transformer. The resistor R4 defines the input current
into the device. The optimum input network is achieved by
setting R4 in the order of 100k
. If R4 is made too large the
capacitor C1 will be very small and the accuracy of the phase
R3
R1
RA
IIN
IIP
GND
CT1
Current In
I
MAX
16µA
RMS
R4
R2
RB
Current Out
C1
C2
R4
R3
IVP
GND
C1
R2
R1
GND
V
NOM
14µA
RMS
Voltage In
Neutral
GND
R5
P1
(P1 + R5) << R4 << (R1 + R2 + R3)



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