MFC2000 datasheet(166/426 Pages) ETC

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MFC2000 Multifunctional Peripheral Controller 2000

Hardware Description

7-18

Conexant

100723A

Bit 15-12 AdclkNeg

(only valid when internal ADC is selected)

AdclkNeg establishes the trailing edge of the adclk signal relative to

the start of each dot period, and is specified in terms of ScanDotScaler

clock periods.

Bit 11-8

AdclkPos

(only valid when internal ADC is selected)

AdclkPos establishes the leading edge of the adclk signal relative to

the start of each dot period, and is specified in terms of ScanDotScaler

clock periods.

Bit 7-4

Digital Data Capture Position

(valid for external ADC only)

This setting indicates where the digital data from ADC should be

captured within a pixel period, and is specified in terms of

ScanDotScaler clock periods.

Bit 3-0

Data Latency

(valid with either internal or external ADC)

This setting indicates the latency or pipeline delay as required by

ADC, and is expressed in the number of pixel clocks.

Important note on how to program adclk & adsample when an internal ADC is selected:

The location and the width of adsample must be established first according to the scanner

requirement (the analog signal is being sampled while adsample = 1, and at the falling edge

of adsample, the signal is stored into an internal capacitor. While adsample = 0, the signal

value is being held in the capacitor.)

Once adsample has been programmed properly, the adclk must be configured according to

the following rule:

a) adclk must be low while adsample is high

MFC2000 bảng dữ liệu(PDF) 166 Page - List of Unclassifed Manufacturers