SHINDENGEN

ELECTRIC MFG.CO.,LTD

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2.3

Interleaving

Master

Slave

Multi-phase interleaved critical conduction mode PFC is configured by connecting the master IC

and several slave ICs.

* Master IC pin names are identified by an appended “M”; slave IC pin names are identified by an appended “S” and a

unique slave identification number at the end.

The IL_OUT(M) pin of the master IC is a signal output pin that activates interleaving by a slave IC.

The IL_OUT(M) pin is connected to the IL_IN(S1) pin of the slave IC.。

As shown in Fig. 8, for multi-phase interleaving of three or more phases, the IL_OUT(S1) pin is

connected to the IL_IN(S2) pin of the next slave IC.

To reduce noise, insert a resistor and a capacitor near the IL_IN pin. We recommend a 1 kΩ

resistor and a 47 pF capacitor.

Fig. 8 Example of interleaved connection

This section discusses turn-on timing and transmission of the ON range in an interleaved circuit.

Fig. 9 shows the operating sequence. The arrows in Fig. 9 indicate the transmission order of ON

range. See Fig. 9 for waveform and arrow numbers referenced in the text below.

1)

The OUT (M) of the master IC outputs a Hi signal determined by the negative edge of

the Z/C pin and the COMP pin voltage.

2)

The IL_OUT(M) signal of the master IC is output in sync with the OUT(M)

(waveform C and arrow 1).

3)

The IL_OUT(M) signal of the master IC is input to the IL_IN(S1) pin of the slave IC

via CR as shown in Fig. 8 (waveforms C and D and arrow 2).

In the slave IC (1), the counter circuit stores the ON range of the IL_IN(S1).

4)

The OUT(S1) of the slave IC (1) is turned on when the master IC is turned off to

output the stored ON range. The ON range is the same as that of the OUT(M)

(waveform E and arrow 3).

5)

The IL_OUT(S1) signal of the slave IC (1) is output in sync with the OUT(S1)

(waveform F and arrow 4).

6)

To achieve multi-phase interleaving, connect the IL_OUT(S1) pin to the IL_IN(S2) pin

of the next slave IC (2) (waveform F and arrow 5).