LTC1850CFW datasheet(20/28 Pages) LINER

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LTC1850/LTC1851

18501f

APPLICATIO S I FOR ATIO

CONVST

CS = RD = LOW

BUSY

DATA

DATA (N – 1)

DATA N

1851 F06

t13

tCONV

Figure 6. Mode 1b CONVST Starts a Conversion. Data is Read by RD

CONVST

CS = RD = LOW

BUSY

DATA

DATA (N – 1)

DATA N

1851 F05

tCONV

Figure 5. Mode 1a CONVST Starts a Conversion. Data Outputs Always Enabled

Figures 5 through 9 show several different modes of

operation. In modes 1a and 1b (Figures 5 and 6),

CS and RD are both tied low. The falling edge of

CONVST starts the conversion. The data outputs are

always enabled and data can be latched with the

BUSY rising edge. Mode 1a shows operation with a narrow

logic low CONVST pulse. Mode 1b shows a narrow logic

high CONVST pulse.

In mode 2 (Figure 7), CS is tied low. The falling edge of

CONVST signal again starts the conversion. Data outputs

are in three-state until read by the MPU with the

RD signal. Mode 2 can be used for operation with a shared

MPU databus.

In slow memory and ROM modes (Figures 8 and 9), CS is

tied low and CONVST and RD are tied together. The MPU

starts the conversion and reads the output with the RD

signal. Conversions are started by the MPU or DSP (no

external sample clock).

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