AD9953PCB datasheet(32/42 Pages) AD

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PRELIMINARY TECHNICAL DATA

AD9953

Cos(X)

DDS Core

To DAC

OSK Enable

CFR<25>

Amplitude Scale

Factor Register

(ASF)

Out

HOLD

Up/Dn

OSK Pin

Amplitude Ramp

Rate Register

(ARR)

Load

Data

Load OSK Timer

CFR1<26>

SyncClock

Clock

inc/dec Enable

Ramp Rate Timer

Auto Scale Factor Generator

AUTO OSK

Enable

CFR<24>

Figure C. On-Off Shaped Keying, Block Diagram

AUTO Shaped On-Off Keying mode operation:

The AUTO Shaped On-Off Keying mode is active when CFR1<25> and CFR1<24> are set. When

AUTO Shaped On-Off Keying mode is enabled, a single scale factor is internally generated and

applied to the multiplier input for scaling the output of the DDS core block (See Figure 9 above).

The scale factor is the output of a 14-bit counter which increments/decrements at a rate determined

by the contents of the 8-bit output ramp rate register. The scale factor increases if the OSK pin is

high, decreases if the pin is low. The scale factor is an unsigned value such that all zeros multiplies

the DDS core output by 0 (decimal) and 3FFFh multiplies the DDS core output by 16383 decimal.

For those users who use the full amplitude (14-bits) but need fast ramp rates, the internally

generated scale factor step size is controlled via the ASF<15:14> bits. The table below describes

the increment/decrement step size of the internally generated scale factor per the ASF<15:14> bits.

REV. PrB 1/30/03

Page 32

Analog Devices, Inc.

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