AD9953PCB datasheet(29/42 Pages) AD

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PRELIMINARY TECHNICAL DATA

AD9953

Profile<1:0> pins and enables the AD9953 to take control of switching between profiles. Modes

are defined that allow continuous or single burst profile switches for three combinations of profile

selection bits. These are listed in the table below. When the any of the CFR1<29:27> bits are

active, the internal profile control mode is engaged.

When the internal profile control mode is engaged, the RAM Segment Mode Control bits are

“Don’t care” and the device operates all profiles as if these mode control bits were programmed for

Ramp-Up mode. Switching between profiles occurs when the RAM address generator has

exhausted the memory contents for the current profile.

CFR1<29:27>

(binary)

Mode Description

000

Internal Control Inactive

001

Internal Control Active, Single Burst, activate profile 0, then 1, then

stop

010

Internal Control Active, Single Burst, activate profile 0, then 1, then 2,

then stop

011

Internal Control Active, Single Burst, activate profile 0, then 1, then 2,

then 3, then stop

100

Internal Control Active, Continuous, activate profile 0, then 1, then

loop starting at 0.

101

Internal Control Active, Continuous, activate profile 0, then 1, then 2,

then loop starting at 0.

110

Internal Control Active, Continuous, activate profile 0, then 1, then 2,

then 3, then loop starting at 0

111

Invalid

Table 4 Internal Profile Control

A single burst mode is one in which the composite sweep is executed once. For example, assume

the device is programmed for Ramp-Up mode and the CFR1<29:27> bits are written to 010(b).

Upon receiving an I/O UPDATE, the internal control logic signals the device to begin executing

the Ramp-Up mode sequence for profile 0. Upon reaching the RAM Segment Final Address value

for profile 0, the device automatically switches to profile 1 and begins executing that Ramp-Up

sequence. Upon reaching the RAM Segment Final Address value for profile 1, the device

automatically switches to profile 2 and begins executing that Ramp-Up sequence. When the RAM

Segment Final Address value for profile 2 is reached, the sequence is over and the composite

sweep has completed. Issuing another I/O UPDATE re-starts the burst process.

REV. PrB 1/30/03

Page 29

Analog Devices, Inc.

A continuous internal profile control mode is one in which the composite sweep is continuously

executed for as long as the device is programmed into that mode. Using the example above, except

programming the CFR1<29:27> bits to 101(b), the operation would be identical until the RAM

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