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RT8092BCGWSC bảng dữ liệu(PDF) 17 Page - Richtek Technology Corporation |
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RT8092BCGWSC bảng dữ liệu(HTML) 17 Page - Richtek Technology Corporation |
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17 / 27 page ![]() RT8092 17 DS8092-03 January 2017 www.richtek.com © Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. Setting the Output Voltage with Internal Feedback Network Besides defined initial output voltages in VSEL high and VSEL low, the RT8092 can manually change voltage reference from 0.3V to 0.7V by I 2C programming. The difference among bank0 to bank3 is internal feedback configuration. Then the output voltage can be designed as following equation : (BANK) OUT REF V = V 2 where VREF stand for reference voltage; BANK is 0 to 3, for bank0 to bank3 separately. The Flow Chart from Power-ON to Soft-Start To summarize the above functions and judgments such as VSEL function, internal feedback network selection at power-on state, following chart shows the actions and protections to clarify the time sequence and priority. Figure 6. Flow chart of power-on state ENABLE Logic Check Power Ready Detection AVDD >1.6V? No Yes Internal ENABLE = High? UVLO Protect PVIN > 2.4V? PVIN UVLO Check No Yes Yes AVDD Deglitch Deglitch time ~ 2µs IC Load Initial Value Settling time ~ 500µs Vout Selection VSEL = High? Output VOUT = 2.8V Output VOUT = 1.0V Yes No AVDD Power On Soft-Start Begin Soft-Start time ~ 400µs No |
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