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CS5490 bảng dữ liệu(PDF) 49 Page - Cirrus Logic |
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CS5490 bảng dữ liệu(HTML) 49 Page - Cirrus Logic |
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49 / 57 page ![]() CS5490 DS982F3 49 6.6.45 Total Reactive Power (QSUM) – Page 16, Address 31 Default = 0 QSUM =QAVG This is a two's complement value in the range of -1.0 value 1.0, with the binary point to the right of the MSB. 6.6.46 DC Offset for Current (IDCOFF) – Page 16, Address 32 Default = 0 DC offset registers IDCOFF are initialized to zero on reset. During DC offset calibration, selected registers are written with the inverse of the DC offset measured. The application program can also write the DC offset reg- ister values. This is a two's complement value in the range of -1.0 value 1.0, with the binary point to the right of the MSB. 6.6.47 DC Offset for Voltage (VDCOFF) – Page 16, Address 34 Default = 0 DC offset registers VDCOFF are initialized to zero on reset. During DC offset calibration, selected registers are written with the inverse of the DC offset measured. The application program can also write the DC offset reg- ister values. It is a two's complement value in the range of -1.0 value 1.0, with the binary point to the right of the MSB. 6.6.48 Gain for Current (IGAIN) – Page 16, Address 33 Default = 1.0 Gain register IGAIN is initialized to 1.0 on reset. During gain calibration, the IGAIN register is written with the multiplicative inverse of the gain measured. This is an unsigned fixed-point value in the range of 0 value 4.0, with the binary point to the right of the second MSB. MSB LSB -(20)2-1 2-2 2-3 2-4 2-5 2-6 2-7 ..... 2-17 2-18 2-19 2-20 2-21 2-22 2-23 MSB LSB -(20)2-1 2-2 2-3 2-4 2-5 2-6 2-7 ..... 2-17 2-18 2-19 2-20 2-21 2-22 2-23 MSB LSB -(20)2-1 2-2 2-3 2-4 2-5 2-6 2-7 ..... 2-17 2-18 2-19 2-20 2-21 2-22 2-23 MSB LSB 21 20 2-1 2-2 2-3 2-4 2-5 2-6 ..... 2-16 2-17 2-18 2-19 2-20 2-21 2-22 |
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