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CS5480 bảng dữ liệu(PDF) 50 Page - Cirrus Logic |
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CS5480 bảng dữ liệu(HTML) 50 Page - Cirrus Logic |
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50 / 70 page ![]() CS5480 50 DS980F3 6.6.21 Voltage Fixed RMS Reference (VFRMS) – Page 16, Address 59 Default = 0x5A 8279 (0.7071068) The VFRMS register contains the internal RMS reference used when voltage input tampering is detected by the application program. The application may choose to set the VFIX bit in the Config2 register to force full-scale energy accumulation at the VFRMS level. This register holds two's complement value in the range of 0.0 value <1.0, with the binary point to the right of the MSB. Negative values are not used. 6.6.22 Sample Count (SampleCount) – Page 16, Address 51 Default = 0x00 0FA0 (4000) Determines the number of OWR samples to use in calculating low-rate results. SampleCount (N) is an integer in the range of 100 to 8,388,607. Values less than 100 should not be used. 6.6.23 Cycle Count (CycleCount) – Page 18, Address 62 Default = 0x00 0064 (100) Determines the number of half-line cycles to use in calculating low-rate results when the CS5480 is in Line-cy- cle Synchronized Averaging mode. CycleCount is an integer in the range of 1 to 8,388,607. Zero should not be used. 6.6.24 Filter Settling Time for Conversion Startup (TSETTLE) – Page 16, Address 57 Default = 0x00 001E (30) Sets the number of OWR samples that will be used to allow filters to settle at the beginning of Conversion and Calibration commands. This is an integer in the range of 0 to 16,777,215 samples. MSB LSB -(20)2-1 2-2 2-3 2-4 2-5 2-6 2-7 ..... 2-17 2-18 2-19 2-20 2-21 2-22 2-23 MSB LSB 0 222 221 220 219 218 217 216 ..... 26 25 24 23 22 21 20 MSB LSB 0 222 221 220 219 218 217 216 ..... 26 25 24 23 22 21 20 MSB LSB 223 222 221 220 219 218 217 216 ..... 26 25 24 23 22 21 20 |
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