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AD8331 bảng dữ liệu(PDF) 31 Page - Analog Devices |
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AD8331 bảng dữ liệu(HTML) 31 Page - Analog Devices |
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31 / 32 page  AD8331/AD8332 Rev. C | Page 31 of 32 AD8332 COM1 LOP1 LMD1 LON1 VPS1 INH1 VOH1 ENB VIP1 VCM1 VIN1 VPSV VOL1 HILO VCM2 RCLMP COMM VOL2 VOH2 VIP2 GAIN VIN2 LOP2 COM2 LMD2 LON2 VPS2 INH2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 PIN 1 IDENTIFIER AD8332 TOP VIEW (Not to Scale) Figure 80. 28-Lead TSSOP Table 6. 28–Lead TSSOP (AR PACKAGE) Pin No. Name Description 1 LMD2 CH2 LNA Signal Ground 2 INH2 CH2 LNA Input 3 VPS2 CH2 Supply LNA 5 V 4 LON2 CH2 LNA Inverting Output 5 LOP2 CH2 LNA Noninverting Output 6 COM2 CH2 LNA Ground 7 VIP2 CH2 VGA Noninverting Input 8 VIN2 CH2 VGA Inverting Input 9 VCM2 CH2 Common-Mode Voltage 10 GAIN Gain Control Voltage 11 RCLMP Output Clamping Resistor 12 VOH2 CH2 Noninverting VGA Output 13 VOL2 CH2 Inverting VGA Output 14 COMM VGA Ground (Both Channels) 15 VPSV VGA Supply 5 V (Both Channels) 16 VOL1 CH1 Inverting VGA Output 17 VOH1 CH1 Noninverting VGA Output 18 ENB Enable—VGA/LNA 19 HILO VGA Gain Range Select (HI or LO) 20 VCM1 CH1 Common-Mode Voltage 21 VIN1 CH1 VGA Inverting Input 22 VIP1 CH1 VGA Noninverting Input 23 COM1 CH1 LNA Ground 24 LOP1 CH1 LNA Noninverting Output 25 LON1 CH1 LNA Inverting Output 26 VPS1 CH1 LNA Supply 5 V 27 INH1 CH1 LNA Input 28 LMD1 CH1 LNA Signal Ground AD8332 TOP VIEW (Not to Scale) LMD2 LON2 VPS2 INH2 LMD1 LON1 VPS1 INH1 14 13 9 12 11 10 15 16 COMM VOL2 VOH2 20 17 18 19 VOH1 VOL1 21 22 23 24 NC VPSV COMM 29 30 31 32 28 25 26 27 1 2 3 4 5 6 7 8 PIN 1 INDICATOR Figure 81. 32-Lead LFCSP Table 7. 32–Lead LFCSP (AC PACKAGE) Pin No. Name Description 1 LON1 CH1 LNA Inverting Output 2 VPS1 CH1 LNA Supply 5 V 3 INH1 CH1 LNA Input 4 LMD1 CH1 LNA Signal Ground 5 LMD2 CH2 LNA Signal Ground 6 INH2 CH2 LNA Input 7 VPS2 CH2 LNA Supply 5 V 8 LON2 CH2 LNA Inverting Output 9 LOP2 CH2 LNA Noninverting Output 10 COM2 CH2 LNA Ground 11 VIP2 CH2 VGA Noninverting Input 12 VIN2 CH2 VGA Inverting Input 13 VCM2 CH2 Common-Mode Voltage 14 MODE Gain Slope Logic Input 15 GAIN Gain Control Voltage 16 RCLMP Output Clamping Level Input 17 COMM VGA Ground 18 VOH2 CH2 Noninverting VGA Output 19 VOL2 CH2 Inverting VGA Output 20 NC Not Connected 21 VPSV VGA Supply 5 V 22 VOL1 CH1 Inverting VGA Output 23 VOH1 CH1 Noninverting VGA Output 24 COMM VGA Ground 25 ENBV VGA Enable 26 ENBL LNA Enable 27 HILO VGA Gain Range Select (HI or LO) 28 VCM1 CH1 Common-Mode Voltage 29 VIN1 CH1 VGA Inverting Input 30 VIP1 CH1 VGA Noninverting Input 31 COM1 CH1 LNA Ground 32 LOP1 CH1 LNA Noninverting Output |
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