AD9286BCPZ-500 datasheet(11/28 Pages) AD

11 / 28 page

AD9286

Data Sheet

Rev. C | Page 10 of 27

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

AVDD

AUXCLK+

AUXCLK–

RBIAS

AUXCLKEN

DRGND

DRVDD

D0– (LSB)

D0+ (LSB)

D1–

D1+

AVDD

CLK+

CLK–

CSB

SDIO/PWDN

SCLK

DRGND

DRVDD

D7+ (MSB)

D7– (MSB)

AVDD

AD9286

TOP VIEW

(Not to Scale)

PIN 1

INDICATOR

NOTES

1. THE EXPOSED PADDLE MUST BE SOLDERED TO THE PCB ANALOG

GROUND TO ENSURE PROPER FUNCTIONALITY AND HEAT

DISSIPATION, NOISE, AND MECHANICAL STRENGTH BENEFITS.

Figure 6. Pin Configuration

Table 8. Pin Function Descriptions

Pin No.

Mnemonic

Type

Description

ADC Power Pins

1, 2, 35, 36, 37, 40, 42,

44, 45, 48

AVDD

Supply

Analog Power Supply (1.8 V Nominal).

8, 27

DRVDD

Supply

Digital Output Driver Supply (1.8 V Nominal).

7, 28

DRGND

Ground

Digital Output Ground.

AGND

Ground

Analog Ground. Pin 0 is the exposed thermal pad on the bottom of the

package. This is the only ground connection, and it must be soldered to

the PCB analog ground to ensure proper functionality and heat dissipation,

noise, and mechanical strength benefits.

ADC Analog Pins

VIN1+

Input

Differential Analog Input Pin (+) for Channel 1.

VIN1−

Input

Differential Analog Input Pin (−) for Channel 1.

VIN2+

Input

Differential Analog Input Pin (+) for Channel 2.

VIN2−

Input

Differential Analog Input Pin (−) for Channel 2.

VREF

Input/output

Voltage Reference Input/Output.

RBIAS

Input/output

External Reference Bias Resistor. Connect 10 kΩ from RBIAS to AGND.

VCM

Output

Common-Mode Level Bias Output for Analog Inputs.

CLK+

Input

ADC Clock Input—True.

CLK−

Input

ADC Clock Input—Complement.

AUXCLK+

Input

Auxiliary ADC Clock Input—True.

AUXCLK−

Input

Auxiliary ADC Clock Input—Complement.

Digital Inputs

AUXCLKEN

Input

Auxiliary Clock Input Enable.

Input

Digital Enable (Active Low) to Tristate Output Data Pins.

Digital Outputs

D7+ (MSB)

Output

Output Data 7—True.

D7− (MSB)

Output

Output Data 7—Complement.

D6+

Output

Output Data 6—True.

D6−

Output

Output Data 6—Complement.

D5+

Output

Output Data 5—True.

D5−

Output

Output Data 5—Complement.

AD9286BCPZ-500 bảng dữ liệu(PDF) 11 Page - Analog Devices

AD9286BCPZ-500 bảng dữ liệu(HTML) 11 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

bảng dữ liệu tải về

Link URL