L9660TR datasheet(21/49 Pages) STMICROELECTRONICS

21 / 49 page

DocID024714 Rev 2

21/49

L9660

Functional description

Serial data input (MOSI)

MOSI inputs take data from the master processor while chip select is asserted. The MSB

shall be the first bit of each word/byte received on MOSI and the LSB shall be the last bit of

each word/byte received.

This pin has TTL level compatible input voltages allowing proper operation with

microprocessors using a 3.3 to 5.0 volt supply.

3.4

Squib drivers

3.4.1

Firing

The on-chip deployment drivers are designed to deliver 1.2 A (min) for 2ms (min) and 1.75A

(min) for 1ms (min) and 1.75A (min) for 0.65ms (min) with VRESx voltages between 7V and

37 V. In addition the L9660 can provide 1.5A minimum for 2ms for VRESx voltages between

7V and 25V. The firing condition is selectable via the SPI. At the end of a deployment, a

deploy success flag is asserted and can be read using the appropriate SPI command. Each

VRESx and GNDx connection is used to accommodate 4 loops that can be deployed

simultaneously.

Upon receiving a valid deployment condition, the respective SQHx and SQLx drivers are

turned on. The only other activation of the SQHx and SQLx drivers is momentarily during a

MOS diagnostic. Otherwise, SQHx and SQLx are inactive under any normal, fault, or

transient conditions. Upon a successful deployment of the respective SQHx and SQLx

drivers, a deploy command success flag is asserted via SPI. Refer to Figure 8 for the valid

conditions and the deploy success flag timing.

L9660TR bảng dữ liệu(PDF) 21 Page - STMicroelectronics