Z86L02 datasheet(5/37 Pages) ZILOG

5 / 37 page

Z86C02/E02/L02

Zilog

Cost Effective, 512-Byte ROM CMOS Z8® Microcontrollers

DS96DZ80301

P R E L I M I N A R Y

ABSOLUTE MAXIMUM RATINGS

Notes:

Stresses greater than those listed under Absolute

Maximum Ratings may cause permanent damage to the

device. This is a stress rating only; functional operation of

the device at any condition above those indicated in the

operational sections of these specifications is not implied.

Exposure to absolute maximum rating conditions for an

extended period may affect device reliability.

Total power dissipation should not exceed 462 mW for the

package. Power dissipation is calculated as follows:

This applies to all pins except where otherwise noted.

Maximum current into pin must be

±600µA.

There is no input protection diode from pin to VDD.

This excludes Pin 6 and Pin 7.

Device pin is not at an output Low state.

Total Power dissipation = VDD x [IDD – (sum of IOH)] + sum of [(VDD – VOH) x IOH] + sum of (V0L x I0L)

STANDARD TEST CONDITIONS

The characteristics listed below apply for standard test

conditions as noted. All voltages are referenced to

Ground. Positive current flows into the referenced pin (Fig-

ure 6).

CAPACITANCE

TA = 25°C, VCC = GND = 0V, f = 1.0 MHz, unmeasured pins returned to GND.

Parameter

Min

Max

Units

Ambient Temperature under Bias

–40

+105

Storage Temperature

–65

+150

Voltage on any Pin with Respect to VSS [Note 1]

–0.7

+12

Voltage on VDD Pin with Respect to VSS

–0.3

Voltage on Pin 7 with Respect to VSS [Note 2] (Z86C02/L02)

–0.7

VDD+1

Voltage on Pin 7,8,9,10 with Respect to VSS [Note 2] (Z86E02)

–0.7

VDD+1

Total Power Dissipation

462

Maximum Allowed Current out of VSS

300

Maximum Allowed Current into VDD

270

Maximum Allowed Current into an Input Pin [Note 3]

–600

+600

µA

Maximum Allowed Current into an Open-Drain Pin [Note 4]

–600

+600

µA

Maximum Allowed Output Current Sinked by Any I/O Pin

Maximum Allowed Output Current Sourced by Any I/O Pin

Maximum Allowed Output Current Sinked by Port 2, Port 0

Maximum Allowed Output Current Sourced by Port 2, Port 0

Figure 6. Test Load Diagram

From Output

Under Test

150 pF

Parameter

Min

Max

Input capacitance

15 pF

Output capacitance

20 pF

I/O capacitance

25 pF

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