STM32F401XD datasheet(21/135 Pages) STMICROELECTRONICS

tên linh kiện	STM32F401XD

Giải thích chi tiết về linh kiện	Clock, reset and supply management

PDF	135 Pages

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STM32F401xD STM32F401xE

Functional overview

The VDD specified threshold, below which the device must be maintained under reset, is

1.7 V (see Figure 6).

A comprehensive set of power-saving mode allows to design low-power applications.

When the internal reset is OFF, the following integrated features are no longer supported:

•

The integrated power-on reset (POR) / power-down reset (PDR) circuitry is disabled.

•

The brownout reset (BOR) circuitry must be disabled.

•

The embedded programmable voltage detector (PVD) is disabled.

•

VBAT functionality is no more available and VBAT pin should be connected to VDD.

3.15

Voltage regulator

The regulator has four operating modes:

•

Regulator ON

–

Main regulator mode (MR)

–

Low power regulator (LPR)

–

Power-down

•

Regulator OFF

3.15.1

Regulator ON

On packages embedding the BYPASS_REG pin, the regulator is enabled by holding

BYPASS_REG low. On all other packages, the regulator is always enabled.

Figure 6. PDR_ON control with internal reset OFF

STM32F401XD bảng dữ liệu(PDF) 21 Page - STMicroelectronics