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STM32F398VE bảng dữ liệu(PDF) 59 Page - STMicroelectronics |
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STM32F398VE bảng dữ liệu(HTML) 59 Page - STMicroelectronics |
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59 / 151 page ![]() DocID027227 Rev 2 59/151 STM32F398VE Electrical characteristics 142 6.2 Absolute maximum ratings Stresses above the absolute maximum ratings listed in Table 15: Voltage characteristics, Table 16: Current characteristics , and Table 17: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Table 15. Voltage characteristics(1) Symbol Ratings Min Max Unit VDD–VSS External main supply voltage (including VDDA, VBAT and VDD) -0.3 1.95 V VDDA–VSS External main supply voltage -0.3 4.0 VDD–VDDA Allowed voltage difference for VDD > VDDA -0.4 VREF+–VDDA(2) Allowed voltage difference for VREF+ > VDDA -0.4 VIN(3) Input voltage on FT and FTf pins VSS 0.3 VDD + 4.0 V Input voltage on TTa and TT pins VSS 0.3 4.0 Input voltage on POR pin VSS 0.3 VDDA + 4.0 Input voltage on any other pin VSS 0.3 4.0 Input voltage on Boot0 pin 0 9 | VDDx| Variations between different VDD power pins - 50 mV |VSSX VSS| Variations between all the different ground pins - 50 VESD(HBM) Electrostatic discharge voltage (human body model) see Section 6.3.12: Electrical sensitivity characteristics - 1. All main power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to the external power supply, in the permitted range. The following relationship must be respected between VDDA and VDD: VDDA must power on before or at the same time as VDD in the power up sequence. VDDA must be greater than or equal to VDD. 2. VREF+ must be always lower or equal than VDDA (VREF+ VDDA). If unused then it must be connected to VDDA. 3. VIN maximum must always be respected. Refer to Table 16: Current characteristics for the maximum allowed injected current values. |
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