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STM32F078CB bảng dữ liệu(PDF) 79 Page - STMicroelectronics |
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STM32F078CB bảng dữ liệu(HTML) 79 Page - STMicroelectronics |
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79 / 120 page ![]() DocID026006 Rev 4 79/120 STM32F078CB, STM32F078RB, STM32F078VB Electrical characteristics 95 Figure 24. Recommended NRST pin protection 1. The external capacitor protects the device against parasitic resets. 2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in Table 53: NRST pin characteristics . Otherwise the reset will not be taken into account by the device. NPOR pin characteristics The NPOR pin input driver uses the CMOS technology. It is connected to a permanent pull- up resistor to the VDDA, RPU. Unless otherwise specified, the parameters given in Table 54 below are derived from tests performed under ambient temperature and supply voltage conditions summarized in Table 23: General operating conditions . Table 53. NRST pin characteristics Symbol Parameter Conditions Min Typ Max Unit VIL(NRST) NRST input low level voltage - - - 0.3 VDD+0.07(1) V VIH(NRST) NRST input high level voltage - 0.445 VDD+0.398(1) -- Vhys(NRST) NRST Schmitt trigger voltage hysteresis -- 200 - mV RPU Weak pull-up equivalent resistor(2) VIN = VSS 25 40 55 kΩ VF(NRST) NRST input filtered pulse - - - 100(1) ns VNF(NRST) NRST input not filtered pulse - 700(1) -- ns 1. Data based on design simulation only. Not tested in production. 2. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution to the series resistance is minimal (~10% order). |
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