STM32F070RB datasheet(81/83 Pages) STMICROELECTRONICS

81 / 83 page

DocID027114 Rev 3

81/83

STM32F070CB/RB/C6/F6

Revision history

Table 64. Document revision history

Date

Revision

Changes

27-Nov-2014

Initial release.

15-Jan-2015

Updated the number of SPI in Features and Section:

Description.

Updated Section: Serial peripheral interface (SPI).

Updated the fourth footnote of Table: STM32F070xB/i

pin definitions, and added the reference to PB9 pin.

Moved the AF3 data to AF4 for PA9 and PA10 pins in

Table: Alternate functions selected through GPIOA_AFR

registers for port A.

Added the reference to footnote 1 to AF0 data for PB12,

PB13, PB14 and PB15, and to AF5 data for PB9 and

PB10 in Table: Alternate functions selected through

GPIOB_AFR registers for port B.

Added the reference to footnote 1 to SPI2 in Table:

STM32F070xB/6 peripheral register boundary

addressesF070.

07-Feb-2016

Updated:

– Removal of Table 1 from cover page (all part numbers

put in the header)

– Table 1: STM32F070CB/RB/C6/F6 family device

features and peripheral counts; number of int. ADC

channels corrected

– Figure 1: Block diagram

– Figure 2: Clock tree

– Table 7: STM32F70x0 USART implementation

– Figure 6: STM32F070CB/RB/C6/F6 memory map and

added the note related to the start address of the

system memory

– Figure 9: Power supply scheme

– Section 3.5.1: Power supply schemes

– Section 3.11: Timers and watchdogs - number of

complementary outputs in the table

– Table 10: STM32F070xB/6 pin definitions - TSSOP20

pinout correction, pins 10, 15 and 16

– Table 23: Embedded internal reference voltage:

added tSTART, changed VREFINT and tS_vrefint values

and notes

– Table 33: LSE oscillator characteristics (fLSE = 32.768

kHz) LSEDRV[1:0] values removed (see ref. manual)

– Table 49: ADC characteristics - tSTAB defined relative

to clock frequency; notes 3. and 4. added

– Table 52: TS characteristics: removed the min. value

for tSTART

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