ST72344K2 datasheet(62/247 Pages) STMICROELECTRONICS

tên linh kiện	ST72344K2

Giải thích chi tiết về linh kiện	SCI asynchronous serial interface

PDF	247 Pages

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Interrupts

ST72344xx, ST2345xx

62/247

Doc ID 12321 Rev 6

Bits 4:3 = IS2[1:0] ei0 and ei1 sensitivity

The interrupt sensitivity, defined using the IS2[1:0] bits, is applied to the following

external interrupts:

●

ei0 (port A3, port E1)

●

ei1 (port F2..0)

These 2 bits can be written only when I1 and I0 of the CC register are both set to 1 (level 3).

Bit 2 = IPA Interrupt polarity for ports A3 and E1

This bit is used to invert the sensitivity of the port A3 and E1 external interrupts. It can

be set and cleared by software only when I1 and I0 of the CC register are both set to 1

(level 3).

0: No sensitivity inversion

1: Sensitivity inversion

Bits 1:0 = Reserved, must always be kept cleared.

Table 20.

External interrupt sensitivity (ei0)

IS21

IS20

Sensitivity

IPA bit =0

IPA bit =1

Falling edge & low level

Rising edge & high level

Rising edge only

Falling edge only

Rising edge only

Rising and falling edge

Table 21.

External interrupt sensitivity (ei1)

IS21

IS20

Sensitivity

Falling edge & low level

Rising edge only

Falling edge only

Rising and falling edge

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