ST7MC1K2-Auto datasheet(271/371 Pages) STMICROELECTRONICS

271 / 371 page

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ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto

On-chip peripherals

271/371

Phase state register (MPHST)

4SC

Simulated commutation event bit

0: Hardware commutation event in auto-switched mode (SWA = 1 in MCRA

1: Simulated commutation event in auto-switched mode (SWA = 1 in MCRA

SPLG

Sampling Z event at high frequency in sensorless mode (SR = 0)

This bit enables sampling at high frequency in sensorless mode independently of

the PWM signal or only during ON time if the DS[3:0] bits in the MCONF register

contain a value. Refer to Table 160: MCONF register description on page 284.

0: Normal mode (Z sampling at PWM frequency at the end of the OFF time)

1: Z event sampled at fSCF (see Table 166)

Note: When the SPLG bit is set, there is no minimum OFF time programmed by the

OT [3:0] bits, the OFF time is forced to 0µs. This means that in current mode, the

OFF time of the PWM signal comes only from the current loop.

2:0

VR[2:0]

BEMF/demagnetization reference threshold

These bits select the VREF value as shown below:

111: VREF voltage threshold = threshold voltage set by external MCVREF pin

110: 3.5V(1)

101: 2.5V(1)

100: 2V(1)

011: 1.5V(1)

010: 1V(1)

001: 0.6V(1)

000: 0.2V(1)

The VREF value is used for BEMF and demagnetization detection.

Typical values for VDD =5V

MPHST

Reset value: 0000 0000 (00h)

654

IS[1:0](1)

Preload bits, new value taken into account at the next C event.

OO[5:0](1)

R/W

Table 137.

MPHST register description

Bit

Name

Function

7:6

IS[1:0]

Input selection bits

These bits mainly select the input to connect to the comparator:

00: channel selected = MCIA.

01: channel selected = MCIB.

10: channel selected = MCIC.

11: channel selected = Both MCIA and MCIB: encoder mode.

The fourth configuration (IS[1:0] = 11) specifies that an incremental encoder is used

(in this case MCIA and MCIB digital signals are directly connected to the

incremental encoder interface and the analog multiplexer is bypassed).

Table 136.

MCRC register description (continued)

Bit

Name

Function

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