ST7MC1K2-Auto datasheet(268/371 Pages) STMICROELECTRONICS

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ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto

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Control register B (MCRB)

MCRB

Reset value: 0000 0000 (00h)

654

Reserved

CPB(1)

Preload bits, new value taken into account at the next C event (in normal mode) or when a value is written

in the MPHST register when in direct access mode. For more details refer to the description of the DAC bit

in Control register A (MCRA) on page 265. The use of a preload register allows all the registers to be

updated at the same time.

HDM(1)

SDM(1)

OCV

OS2(1)

OS[1:0]

R/W

Table 131.

MCRB register description

Bit

Name

Function

Reserved, must be kept at reset value.

6CPB

Compare bit for zero-crossing detection

0: Zero crossing detection on falling edge

1: Zero crossing detection on rising edge

5HDM

Hardware demagnetization event mask bit

0: Hardware demagnetization disabled

1: Hardware demagnetization enabled

4SDM

Simulated demagnetization event mask bit

0: Simulated demagnetization disabled

1: Simulated demagnetization enabled

3OCV

Over current handling in voltage mode

0: Overcurrent protection is OFF

1: Overcurrent protection is ON

This bit acts as described in Table 132.

2:0

OS2,

OS[1:0]

Operating output mode selection bits

These bits are used to define the various PWM output configurations. Refer to the

step behavior diagrams (Figure 110 and Figure 111), Table 133: Step

behavior/sensorless mode, Table 134: PWM mode when SR = 1, and Table 135:

PWM mode when DAC = 1.

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