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SPC560B40X bảng dữ liệu(PDF) 20 Page - STMicroelectronics |
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SPC560B40X bảng dữ liệu(HTML) 20 Page - STMicroelectronics |
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20 / 116 page ![]() Package pinouts and signal descriptions SPC560B40x/50x, SPC560C40x/50x 20/116 DocID14619 Rev 13 3.5 System pins The system pins are listed in Table 5. 3.6 Functional ports The functional port pins are listed in Table 6. c. All medium and fast pads are in slow configuration by default at reset and can be configured as fast or medium (see PCR.SRC in section Pad Configuration Registers (PCR0–PCR122) in the device reference manual). Table 5. System pin descriptions Function Pin number RESET Bidirectional reset with Schmitt-Trigger characteristics and noise filter. I/O M Input, weak pull-up only after PHASE2 917 21 J1 EXTAL Analog output of the oscillator amplifier circuit, when the oscillator is not in bypass mode. Analog input for the clock generator when the oscillator is in bypass mode.(2) I/O X Tristate 27 36 50 N8 XTAL Analog input of the oscillator amplifier circuit. Needs to be grounded if oscillator is used in bypass mode.(2) I X Tristate 25 34 48 P8 1. LBGA208 available only as development package for Nexus2+ 2. See the relevant section of the datasheet |
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