ST1S50 datasheet(16/29 Pages) STMICROELECTRONICS

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Application information

ST1S50

16/29

DocID025723 Rev 4

In Table 6 some multi-layer ceramic capacitors suitable for this device are reported.

A ceramic bypass capacitor, as close as possible to the VINA pin, so that additional parasitic

ESR and ESL are minimized, is suggested in order to prevent instability on the output

voltage due to noise. The value of the bypass capacitor can go from 330 nF to 1

F.

6.2

Inductor selection

The inductance value fixes the current ripple flowing through the output capacitor. So the

minimum inductance value to have the expected current ripple has to be selected. The rule

to fix the current ripple value is to have a ripple at 20% - 40% of the output current.

In the continuous current mode (CCM), the inductance value can be calculated by Equation

18:

Equation 18

Where TON is the conduction time of the high-side switch and TOFF is the conduction time of

the low-side switch (in CCM, FSW = 1 / (TON + TOFF)). The maximum current ripple, given

the VOUT, is obtained at maximum TOFF, that is at a minimum duty cycle (see Section 6.1 to

calculate minimum duty). So fixing

IL= 20% to 30% of the maximum output current, the

minimum inductance value can be calculated:

Equation 19

where FSWMIN is the minimum switching frequency, according to Table 4 on page 6.

The peak current through the inductor is given by:

Equation 20

So if the inductor value decreases, the peak current (that has to be lower than the current

limit of the device) increases. The higher is the inductor value, the higher is the average

output current that can be delivered, without reaching the current limit.

Table 6. Input MLCC capacitors

Manufacturer

Series

Cap value (

F)

Rated voltage (V)

Murata

GRM31

GRM55

TDK

C3225

I

VIN VOUT

–

------------------------------ TON



VOUT

-------------- TOFF



LMIN

VOUT

I

MAX

----------------

1DMIN

–

FSWMIN

-----------------------



ILPK



I

--------

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