DM368ZCEZ datasheet(8/208 Pages) TI1

8 / 208 page

TMS320DM368

SPRS668C

– APRIL 2010 – REVISED JUNE 2011

www.ti.com

Table 2-1. Characteristics of the Processor (continued)

HARDWARE FEATURES

DEVICE

Product Preview (PP),

Product Status(1)

Advance Information (AI),

or Production Data (PD)

(1)

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas

Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

2.2

Device Compatibility

The ARM926EJ-S RISC CPU is compatible with other ARM9 CPUs from ARM Holdings plc.

2.3

ARM Subsystem Overview

The ARM Subsystem contains components required to provide the ARM926EJ-S (ARM) master control of

the overall device system, including the components of the ARM Subsystem, the peripherals, and the

external memories.

The ARM is responsible for handling system functions such as system-level initialization, configuration,

user interface, user command execution, connectivity functions, interface and control of the subsystem,

etc. The ARM is master and performs these functions because it has a large program memory space and

fast context switching capability, and is thus suitable for complex, multi-tasking, and general-purpose

control tasks.

2.3.1

Components of the ARM Subsystem

The ARM Subsystem consists of the following components:

•

ARM926EJ-S RISC processor, including:

– coprocessor 15 (CP15)

– MMU

– 16KB Instruction cache

– 8KB Data cache

– Write Buffer

– Java accelerator

•

ARM Internal Memories

– 32KB Internal RAM (32-bit wide access)

– 16KB Internal ROM (ARM bootloader for non-AEMIF boot modes)

•

Embedded Trace Module and Embedded Trace Buffer (ETM/ETB)

•

System Control Peripherals

– ARM Interrupt Controller

– PLL Controller

– Power and Sleep Controller

– System Control Module

The ARM also manages/controls all the device peripherals.

Figure 2-1 shows the functional block diagram of the ARM Subsystem.

Device Overview

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