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PC87570 bảng dữ liệu(PDF) 131 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
tên linh kiện PC87570
Giải thích chi tiết về linh kiện  PC87570 Keyboard and Power Management Controller
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nhà sản xuất  NSC [National Semiconductor (TI)]
Trang chủ  http://www.national.com
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PC87570 bảng dữ liệu(HTML) 131 Page - National Semiconductor (TI)

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Development System Support
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18.4.3
Pipe Status Signals
The Pipe Flow Signal (PFS) indicates the completion of an
instruction in the CR16A. The Pipe Long Instruction (PLI)
signal indicates the size of the completed instruction, where
0 = word instruction and 1 = double-word instruction. If an
instruction flashes the pipeline, the fetch for the next instruc-
tion (BST=101) is issued during the cycle following the in-
struction’s PFS, or later. See Figure 18-1.
18.5 DEVELOPMENT SYSTEM REGISTERS
18.5.1
Debug Configuration Register (DBGCFG)
The DBGCFG Register is a byte-wide, read/write register
that controls the configuration of debug support features.
Upon reset, DBGCFG is cleared (0).
The DBGCFG Register controls the debug features. Only
the development tools may access DBGCFG. This enables
application software to be binary compatible in all environ-
ments.
Bit 0 - ON
0: In IRE and IRD environments, always cleared to 0;
any data written to it is ignored.
1: In Dev environment, enables the following debug
support features:
- ISE interrupt input signal
- Use of other bits in the DBGCFG.
Bit 1 - FREEZE
0: No effect
1: When ON is 1, stops the WATCHDOG timer from
counting. All destructive reads (i.e., bits set or
cleared by read operations and other events trig-
gered by reads), become indifferent to reads. An
exception is the NMISTAT Register, which is not ef-
fected by reads. Additional modules may be frozen
as defined by DBGFRZEN Register. FREEZE has
no effect when ON is 0.
18.5.2
Debug Freeze Enable Register (DBGFRZEN)
The DBGFRZEN Register is a byte-wide, read/write register
that enables the freeze operation on some modules during
debug. Each bit when set, enable the freeze of activities in
the respective module when the DBGCFG.FREEZE bit is set
(if DBGCFG.ON=1). Upon reset, DBGFRZEN is cleared (0).
Bit 0 - MFT16 Freeze Enable (MFT16FEN)
0: FREEZE in the DBGCFG Register has no effect on
the MFT16
1: Freezes the MFT16 when FREEZE is set
Bit 1 - ACB Freeze Enable (ACBFEN)
0: FREEZE in the DBGCFG Register has no effect on
the ACB interface
1: Freezes the ACB interface when FREEZE is set
7
2
1
0
Reserved
FREEZE
ON
CLK
PFS
PLI
Instruction i
Completed
Instruction i+1
Completed
Figure 18-1. Pipe Status Signal (PFS and PLI)
7
2
1
0
Reserved
ACBFEN
MFT16FEN



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